[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/baytrail: Get rid of struct romstage_params

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32966

Change subject: soc/intel/baytrail: Get rid of struct romstage_params
......................................................................

soc/intel/baytrail: Get rid of struct romstage_params

struct romstage_params holds the BIST and a struct mrc_params pointer.
The BIST information is unused.
It is easier to just use a mrc_params struct variable.

Change-Id: I54b7c6af2f47e85f66e67c81b7a0510488ca8da2
Signed-off-by: Arthur Heymans 
---
M src/mainboard/google/rambi/romstage.c
M src/soc/intel/baytrail/include/soc/romstage.h
M src/soc/intel/baytrail/romstage/romstage.c
3 files changed, 13 insertions(+), 26 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/32966/1

diff --git a/src/mainboard/google/rambi/romstage.c b/src/mainboard/google/rambi/romstage.c
index 5322267..eba8beb 100644
--- a/src/mainboard/google/rambi/romstage.c
+++ b/src/mainboard/google/rambi/romstage.c
@@ -55,20 +55,16 @@
    return &spd_file_content[SPD_SIZE * ram_id];
 }

-void mainboard_romstage_entry(struct romstage_params *rp)
+void mainboard_romstage_entry(struct mrc_params *mrc_params)
 {
    void *spd_content;
    int dual_channel = 0;
    void *spd_file;
    size_t spd_fsize;

-	struct mrc_params mp = {
-		.mainboard = {
-			.dram_type = DRAM_DDR3L,
-			.dram_info_location = DRAM_INFO_SPD_MEM,
-			.weaker_odt_settings = 1,
-		},
-	};
+	mrc_params->mainboard.dram_type = DRAM_DDR3L;
+	mrc_params->mainboard.dram_info_location = DRAM_INFO_SPD_MEM;
+	mrc_params->mainboard.weaker_odt_settings = 1;

spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
    					&spd_fsize);
@@ -77,10 +73,9 @@

spd_content = get_spd_pointer(spd_file, spd_fsize / SPD_SIZE,
                                  &dual_channel);
-	mp.mainboard.dram_data[0] = spd_content;
+	mrc_params->mainboard.dram_data[0] = spd_content;
    if (dual_channel)
-		mp.mainboard.dram_data[1] = spd_content;
+		mrc_params->mainboard.dram_data[1] = spd_content;

-	rp->mrc_params = ∓
-	romstage_common(rp);
+	romstage_common(mrc_params);
 }
diff --git a/src/soc/intel/baytrail/include/soc/romstage.h b/src/soc/intel/baytrail/include/soc/romstage.h
index 3e8b6a2..4fceefb 100644
--- a/src/soc/intel/baytrail/include/soc/romstage.h
+++ b/src/soc/intel/baytrail/include/soc/romstage.h
@@ -24,13 +24,8 @@
 #include <arch/cpu.h>
 #include <soc/mrc_wrapper.h>

-struct romstage_params {
-	unsigned long bist;
-	struct mrc_params *mrc_params;
-};
-
-void mainboard_romstage_entry(struct romstage_params *params);
-void romstage_common(struct romstage_params *params);
+void mainboard_romstage_entry(struct mrc_params *mrc_params);
+void romstage_common(struct mrc_params *mrc_params);

void raminit(struct mrc_params *mp, int prev_sleep_state);
 void gfx_init(void);
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 5621dd1..73991df 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -99,10 +99,7 @@
 /* Entry from cache-as-ram.inc. */
 static void romstage_main(uint64_t tsc, uint32_t bist)
 {
-	struct romstage_params rp = {
-		.bist = bist,
-		.mrc_params = NULL,
-	};
+	struct mrc_params mrc_params;

/* Save initial timestamp from bootblock. */
    timestamp_init(tsc);
@@ -127,7 +124,7 @@
    gfx_init();

/* Call into mainboard. */
-	mainboard_romstage_entry(&rp);
+	mainboard_romstage_entry(&mrc_params);

platform_enter_postcar();

@@ -212,7 +209,7 @@
 }

/* Entry from the mainboard. */
-void romstage_common(struct romstage_params *params)
+void romstage_common(struct mrc_params *mrc_params)
 {
    struct chipset_power_state *ps;
    int prev_sleep_state;
@@ -231,7 +228,7 @@

/* Initialize RAM */
-	raminit(params->mrc_params, prev_sleep_state);
+	raminit(mrc_params, prev_sleep_state);

timestamp_add_now(TS_AFTER_INITRAM);