[coreboot-gerrit] Change in coreboot[master]: soc/intel/mp_init.c: Ensure proper romcache programming

[Arthur Heymans (Code Review)]

Attention is currently required from: Arthur Heymans.
Hello Arthur Heymans,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/63554

to review the following change.

Change subject: soc/intel/mp_init.c: Ensure proper romcache programming
......................................................................

soc/intel/mp_init.c: Ensure proper romcache programming

AP threads share MTRRs so to avoid APs overwriting the romcache MTRR
programming make sure the APs finished.

Change-Id: I74892100c19b46729ed401b4a50638d8cf07ece8
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/common/block/cpu/mp_init.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/63554/1

diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 823f23e..d7b1b4f 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -169,7 +169,7 @@
 /* Ensure to re-program all MTRRs based on DRAM resource settings */
 static void post_cpus_init(void *unused)
 {
-	if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL) != CB_SUCCESS)
+	if (wait_finished_mp_run_on_all_cpus(wrapper_x86_setup_mtrrs, NULL) != CB_SUCCESS)
    	printk(BIOS_ERR, "MTRR programming failure\n");

post_cpus_add_romcache();