Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38234 )
Change subject: intel/i440bx,i82371: Remove wrapper spd_read_byte() ......................................................................
intel/i440bx,i82371: Remove wrapper spd_read_byte()
Change-Id: Ib94ce73eb22c5b4b489dbd871279e8cd9a7010a7 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/asus/p2b-ds/romstage.c M src/mainboard/asus/p2b-ls/romstage.c M src/mainboard/asus/p2b/romstage.c M src/mainboard/asus/p3b-f/romstage.c M src/northbridge/intel/i440bx/raminit.c M src/northbridge/intel/i440bx/raminit.h 6 files changed, 14 insertions(+), 40 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/38234/1
diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c index 5fed7c5..80435bf 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p2b-ds/romstage.c @@ -15,7 +15,6 @@ */
#include <console/console.h> -#include <device/smbus_host.h> #include <northbridge/intel/i440bx/raminit.h> #include <arch/romstage.h> #include <superio/winbond/common/winbond.h> @@ -24,17 +23,11 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - void mainboard_romstage_entry(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init();
- enable_smbus(); sdram_initialize(); cbmem_initialize_empty(); } diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/romstage.c index 4e5c355..e5d0317 100644 --- a/src/mainboard/asus/p2b-ls/romstage.c +++ b/src/mainboard/asus/p2b-ls/romstage.c @@ -15,7 +15,6 @@ */
#include <console/console.h> -#include <device/smbus_host.h> #include <northbridge/intel/i440bx/raminit.h> #include <arch/romstage.h> #include <superio/winbond/common/winbond.h> @@ -25,17 +24,11 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - void mainboard_romstage_entry(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init();
- enable_smbus(); sdram_initialize(); cbmem_initialize_empty(); } diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/romstage.c index 971255a4..ac98331 100644 --- a/src/mainboard/asus/p2b/romstage.c +++ b/src/mainboard/asus/p2b/romstage.c @@ -15,7 +15,6 @@ */
#include <console/console.h> -#include <device/smbus_host.h> #include <northbridge/intel/i440bx/raminit.h> #include <arch/romstage.h> #include <superio/winbond/common/winbond.h> @@ -24,17 +23,11 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - void mainboard_romstage_entry(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init();
- enable_smbus(); sdram_initialize(); cbmem_initialize_empty(); } diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c index 4645450..9d6c609 100644 --- a/src/mainboard/asus/p3b-f/romstage.c +++ b/src/mainboard/asus/p3b-f/romstage.c @@ -16,7 +16,6 @@
#include <arch/io.h> #include <console/console.h> -#include <device/smbus_host.h> #include <southbridge/intel/i82371eb/i82371eb.h> #include <northbridge/intel/i440bx/raminit.h> #include <arch/romstage.h> @@ -28,11 +27,6 @@ /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - /* * ASUS P3B-F specific SPD enable magic. * @@ -69,7 +63,6 @@ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init();
- enable_smbus(); enable_pm();
enable_spd(); diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c index 0f9f2f6..c90202e 100644 --- a/src/northbridge/intel/i440bx/raminit.c +++ b/src/northbridge/intel/i440bx/raminit.c @@ -21,6 +21,7 @@ #include <device/mmio.h> #include <device/pci_ops.h> #include <device/pci_def.h> +#include <device/smbus_host.h> #include <console/console.h> #include "i440bx.h" #include "raminit.h" @@ -650,7 +651,7 @@ reg = pci_read_config8(NB, DRAMC);
for (i = 0; i < DIMM_SOCKETS; i++) { - value = spd_read_byte(DIMM0 + i, SPD_REFRESH); + value = smbus_read_byte(DIMM0 + i, SPD_REFRESH); if (value < 0) continue; reg = (reg & 0xf8) | refresh_rate_map[(value & 0x7f)]; @@ -694,8 +695,8 @@ struct dimm_size sz; int i, module_density, dimm_banks; sz.side1 = 0; - module_density = spd_read_byte(device, SPD_DENSITY_OF_EACH_ROW_ON_MODULE); - dimm_banks = spd_read_byte(device, SPD_NUM_DIMM_BANKS); + module_density = smbus_read_byte(device, SPD_DENSITY_OF_EACH_ROW_ON_MODULE); + dimm_banks = smbus_read_byte(device, SPD_NUM_DIMM_BANKS);
/* Find the size of side1. */ /* Find the larger value. The larger value is always side1. */ @@ -780,7 +781,7 @@ nbxecc >>= 2;
/* First check if a DIMM is actually present. */ - value = spd_read_byte(device, SPD_MEMORY_TYPE); + value = smbus_read_byte(device, SPD_MEMORY_TYPE); /* This is 440BX! We do EDO too! */ if (value == SPD_MEMORY_TYPE_EDO || value == SPD_MEMORY_TYPE_SDRAM) { @@ -801,21 +802,21 @@ dra = 0;
/* Columns */ - col = spd_read_byte(device, SPD_NUM_COLUMNS); + col = smbus_read_byte(device, SPD_NUM_COLUMNS);
/* * Is this an ECC DIMM? Actually will be a 2 if so. * TODO: Other register than NBXCFG also needs this * ECC information. */ - value = spd_read_byte(device, SPD_DIMM_CONFIG_TYPE); + value = smbus_read_byte(device, SPD_DIMM_CONFIG_TYPE);
/* Data width */ - width = spd_read_byte(device, SPD_MODULE_DATA_WIDTH_LSB); + width = smbus_read_byte(device, SPD_MODULE_DATA_WIDTH_LSB);
/* Exclude error checking data width from page size calculations */ if (value) { - value = spd_read_byte(device, + value = smbus_read_byte(device, SPD_ERROR_CHECKING_SDRAM_WIDTH); width -= value; /* ### ECC */ @@ -831,7 +832,7 @@ * By registered, only the address and control lines need to be, which * we can tell by reading SPD byte 21, bit 1. */ - value = spd_read_byte(device, SPD_MODULE_ATTRIBUTES); + value = smbus_read_byte(device, SPD_MODULE_ATTRIBUTES);
PRINT_DEBUG("DIMM is "); if ((value & MODULE_REGISTERED) == 0) { @@ -847,12 +848,12 @@ dra = (value >> 13);
/* Number of banks of DIMM (single or double sided). */ - value = spd_read_byte(device, SPD_NUM_DIMM_BANKS); + value = smbus_read_byte(device, SPD_NUM_DIMM_BANKS);
/* Once we have dra, col is done and can be reused. * So it's reused for number of banks. */ - col = spd_read_byte(device, SPD_NUM_BANKS_PER_SDRAM); + col = smbus_read_byte(device, SPD_NUM_BANKS_PER_SDRAM);
if (value == 1) { /* @@ -1037,6 +1038,8 @@
void sdram_initialize(void) { + enable_smbus(); + dump_spd_registers(); sdram_set_registers(); sdram_set_spd_registers(); diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h index 448f8d6..d490648 100644 --- a/src/northbridge/intel/i440bx/raminit.h +++ b/src/northbridge/intel/i440bx/raminit.h @@ -21,7 +21,6 @@ #define DIMM_SOCKETS 4
/* Function prototypes. */ -int spd_read_byte(unsigned int device, unsigned int address); void sdram_set_registers(void); void sdram_set_spd_registers(void); void sdram_enable(void);