Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9187
-gerrit
commit 922c66d4609570ba2f890740fe0e1e6661387c9e Author: Vadim Bendebury vbendeb@chromium.org Date: Tue Nov 4 16:12:05 2014 -0800
urara: Fix CBFS header definitions
Urara CBFS header configuration is broken. CBFS header needs to be right above the bootblock, and the CBFS data - 0x100 bytes above, to allow room for proper CBFS wrapper structures.
Ideally only the header offset should be specified (and even that could be derived from the bootblock size). But this is a more generic problem to be addressed with different architectures' image layout requirements in mind.
BRANCH=none BUG=chrome-os-partner:31438 TEST=coreboot image passes the integrity check now (it was failing before because CBGS header was overlaying the bootblock)
$ FEATURES=noclean emerge-urara coreboot $ /build/urara/tmp/portage/sys-boot/coreboot-9999/work/coreboot-9999/build/util/bimgtool/bimgtool \ /build/urara/firmware/coreboot.rom.serial $ cbfstool /build/urara/firmware/coreboot.rom.serial print coreboot.rom.serial: 1024 kB, bootblocksize 9956, romsize 1048576, offset 0x4100 alignment: 64 bytes, architecture: mips
Name Offset Type Size fallback/romstage 0x4100 stage 7100 fallback/ramstage 0x5d00 stage 18995 config 0xa780 raw 2452 (empty) 0xb140 null 1003096
Change-Id: Id615bdcc6261dea9f36a409bd90f1e4764353bb9 Signed-off-by: Stefan Reinauer reinauer@chromium.org Original-Commit-Id: 8a0115963aa7460e4c7255ab8508d7d52d67fb67 Original-Change-Id: Id200ab5421661ef39b7c7713e931c39153fdc8be Original-Signed-off-by: Vadim Bendebury vbendeb@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/227523 Original-Reviewed-by: Stefan Reinauer reinauer@chromium.org --- src/cpu/mips/Kconfig | 5 ----- src/soc/imgtec/pistachio/Kconfig | 4 ++++ 2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/src/cpu/mips/Kconfig b/src/cpu/mips/Kconfig index 093a1f0..2230c14 100644 --- a/src/cpu/mips/Kconfig +++ b/src/cpu/mips/Kconfig @@ -30,8 +30,3 @@ config BOOTBLOCK_ROM_OFFSET hex depends on CPU_MIPS default 0x00 - -config CBFS_HEADER_ROM_OFFSET - hex - depends on CPU_MIPS - default 0x10 diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig index 183c457..48ffc43 100644 --- a/src/soc/imgtec/pistachio/Kconfig +++ b/src/soc/imgtec/pistachio/Kconfig @@ -41,6 +41,10 @@ config BOOTBLOCK_BASE default 0x9b000000
config CBFS_ROM_OFFSET + hex + default 0x4100 + +config CBFS_HEADER_ROM_OFFSET # Effectively the maximum size of the bootblock hex default 0x4000