[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: add soc implementation for ETR address API

[Aamir Bohra (Code Review)]

Hello Ravishankar Sarawadi, Patrick Rudolph, Karthik Ramasubramanian, Subrata Banik, Michael Niewöhner, Wonkyu Kim, Ravishankar Sarawadi, Rizwan Qureshi, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/37555

to look at the new patch set (#4).

Change subject: soc/intel/tigerlake: add soc implementation for ETR address API
......................................................................

soc/intel/tigerlake: add soc implementation for ETR address API

Add soc_pmc_etr_addr function definition in tigerlake SOC code.
The function is declared in common soc intel pmc driver.

Change-Id: Icc471b16304c72a9341abdd9797ba3f8d0d3d1bc
Signed-off-by: Aamir Bohra 
---
M src/soc/intel/tigerlake/pmutil.c
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/37555/4