Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37349 )
Change subject: AGESA,binaryPI: Remove redundant SSE enable
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Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37349/1/src/drivers/amd/agesa/cache...
File src/drivers/amd/agesa/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/37349/1/src/drivers/amd/agesa/cache...
PS1, Line 39: /* Turn on OSFXSR [BIT9] and OSXMMEXCPT [BIT10] onto CR4 register */
We need to double-check what the alternative does. And see if romcc bootblock still has this somewhere.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ib3bf731b74cb20e886d3ecd483b37b1e3fc64ebf
Gerrit-Change-Number: 37349
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Gerrit-Comment-Date: Fri, 29 Nov 2019 07:25:00 +0000
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