Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/70670 )
Change subject: soc/amd/mendocino: add dptc tablet mode support ......................................................................
soc/amd/mendocino: add dptc tablet mode support
add dptc support for different power parameter on tablet/clamshell mode.
BUG=b:257187831 BRANCH=none TEST=validate the parameter change for each mode by AGT.
Signed-off-by: Chris.Wang chris.wang@amd.corp-partner.google.com Change-Id: I96e04d113d18b42f3457056a5e4fa311ceccffb3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70670 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Raul Rangel rrangel@chromium.org Reviewed-by: Tim Van Patten timvp@google.com Reviewed-by: John Su john_su@compal.corp-partner.google.com Reviewed-by: Dtrain Hsu dtrain_hsu@compal.corp-partner.google.com Reviewed-by: Frank Wu frank_wu@compal.corp-partner.google.com --- M src/mainboard/google/skyrim/Kconfig M src/soc/amd/mendocino/Kconfig M src/soc/amd/mendocino/chip.h M src/soc/amd/mendocino/root_complex.c 4 files changed, 59 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Frank Wu: Looks good to me, approved Raul Rangel: Looks good to me, approved John Su: Looks good to me, approved Dtrain Hsu: Looks good to me, approved Tim Van Patten: Looks good to me, approved
diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index f171b9f..5eee2d6 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -164,11 +164,4 @@ just the small SRAM buffer to a much larger area reserved in main memory.
-config FEATURE_DYNAMIC_DPTC - bool - depends on SOC_AMD_COMMON_BLOCK_ACPI_DPTC - help - Selected by mainboards that implement support for ALIB - to enable dynamic DPTC. - endif # BOARD_GOOGLE_BASEBOARD_SKYRIM diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index ef03ec1..70f81c5 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -324,6 +324,20 @@ cores to transition between p-states independently. A vendor may choose to generate _PSD object to allow cores to transition together.
+config FEATURE_DYNAMIC_DPTC + bool + depends on SOC_AMD_COMMON_BLOCK_ACPI_DPTC + help + Selected by mainboards that implement support for ALIB + to enable dynamic DPTC. + +config FEATURE_TABLET_MODE_DPTC + bool + depends on SOC_AMD_COMMON_BLOCK_ACPI_DPTC + help + Selected by mainboards that implement support for ALIB to + switch default and tablet mode. + menu "PSP Configuration Options"
config AMD_FWM_POSITION_INDEX diff --git a/src/soc/amd/mendocino/chip.h b/src/soc/amd/mendocino/chip.h index 11121c5..c206445 100644 --- a/src/soc/amd/mendocino/chip.h +++ b/src/soc/amd/mendocino/chip.h @@ -74,6 +74,9 @@ uint32_t vrm_maximum_current_limit_throttle_mA; uint32_t vrm_soc_current_limit_throttle_mA;
+ /* tablet mode.*/ + uint32_t sustained_power_limit_mW_tablet; + /* Thermal profile B*/ uint32_t fast_ppt_limit_mW_B; uint32_t slow_ppt_limit_mW_B; diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c index 35fc573..f239a42 100644 --- a/src/soc/amd/mendocino/root_complex.c +++ b/src/soc/amd/mendocino/root_complex.c @@ -255,6 +255,24 @@ acpigen_write_alib_dptc_no_battery((uint8_t *)&no_battery_input, sizeof(no_battery_input));
+#if (CONFIG(FEATURE_TABLET_MODE_DPTC)) + struct dptc_input tablet_input = DPTC_INPUTS( + config->thermctl_limit_degreeC, + config->sustained_power_limit_mW_tablet, + config->slow_ppt_time_constant_s, + config->fast_ppt_limit_mW, + config->slow_ppt_limit_mW, + config->vrm_current_limit_mA, + config->vrm_maximum_current_limit_mA, + config->vrm_soc_current_limit_mA, + config->stt_min_limit, + config->stt_m1, + config->stt_m2, + config->stt_c_apu, + config->stt_skin_temp_apu); + acpigen_write_alib_dptc_tablet((uint8_t *)&tablet_input, sizeof(tablet_input)); +#endif + #if (CONFIG(FEATURE_DYNAMIC_DPTC)) /* Profile B */ struct dptc_input thermal_B_input = DPTC_INPUTS(