[coreboot-gerrit] Change in coreboot[master]: Revert "soc/intel/common: Set controller state to active in uart init"

[Christian Walter (Code Review)]

Hello Patrick Rudolph, Subrata Banik, Meera Ravindranath, Usha P, Aamir Bohra, V Sowmya, build bot (Jenkins), Furquan Shaikh,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/34307

to review the following change.

Change subject: Revert "soc/intel/common: Set controller state to active in uart init"
......................................................................

Revert "soc/intel/common: Set controller state to active in uart init"

This reverts commit 46445155ea21b0aa9106e12a00b9b1d89887a461.

Reason for revert: Breaks coreboot. Either no UART working or the complete boot process stops.

Change-Id: If581f42e423caa76deb4ecf67296a7c2f1f7705d
---
M src/soc/intel/common/block/uart/uart.c
1 file changed, 3 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/34307/1

diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 82e5df4..9d820ff 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -33,11 +33,8 @@
 extern const struct uart_gpio_pad_config uart_gpio_pads[];
 extern const int uart_max_index;

-static void uart_lpss_init(struct device *dev, uintptr_t baseaddr)
+static void uart_lpss_init(uintptr_t baseaddr)
 {
-	 /* Ensure controller is in D0 state */
-	lpss_set_power_state(dev, STATE_D0);
-
    /* Take UART out of reset */
    lpss_reset_release(baseaddr);

@@ -84,7 +81,7 @@
    /* Enable memory access and bus master */
    pci_write_config32(dev, PCI_COMMAND, UART_PCI_ENABLE);

-	uart_lpss_init(device, baseaddr);
+	uart_lpss_init(baseaddr);
 }

struct device *uart_get_device(void)
@@ -227,7 +224,7 @@

base = pci_read_config32(dev, PCI_BASE_ADDRESS_0) & ~0xFFF;
    	if (base)
-			uart_lpss_init(dev, base);
+			uart_lpss_init(base);
    }
 }