[coreboot-gerrit] [M] Change in coreboot[main]: soc/intel/pantherlake: Add core scaling factors read support

[Jérémy Compostella (Code Review)]

Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85554?usp=email )

Change subject: soc/intel/pantherlake: Add core scaling factors read support
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Patch Set 11:

(2 comments)

Patchset:

PS11:
> i don't believe we really need to apply dynamic setting for CrOS configuration because CrOS always w […]

Initially, I shared similar concerns when assigned this task. However, after consulting with internal experts, I gained insights into the rationale behind the proposed dynamic approach. Recent experiences have revealed a disconnect between IA firmware, operating system, and other SoC firmware, resulting in certain issues. Recognizing the minimal boot time impact of approximately 12 microseconds associated with reading these values, I concluded that this approach was prudent to mitigate long-term concerns. This recommendation extends to future generations as well.

File src/soc/intel/common/block/acpi/cpu_hybrid.c:

https://review.coreboot.org/c/coreboot/+/85554/comment/c68f482f_6c39ba47?usp... :
PS11, Line 18: enum cpu_perf_eff_type {
             : 	CPU_TYPE_EFF,
             : 	CPU_TYPE_PERF,
             : };
> this code change and https://review.coreboot. […]

It is, unfortunately, a bit late to take such a comment into account.