Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38472 )
Change subject: amd/agesa: Make BottomIo position configurable ......................................................................
Patch Set 1:
Patch Set 1:
What are the final MTRR settings with this? 2G is often a nice setting as it cleanly splits the 4G region in two, requiring only 1 MTRR to cover the bottom or top region.
I've done three Lenovo G505S builds: for 0x40, 0x80 and 0xc0 BottomIo values. From https://github.com/mikebdp2/bottomio_research files we could see that MTRR fixed ranges are the same (00000-9FFFF write-back, A0000-BFFFF uncachable, C0000-FFFFF write-back), while the MTRR variable ranges are:
0x40 :
reg00: base=0x0ffc00000 ( 4092MB), size= 4MB, count=1: write-protect // up to 0x1.0000.0000 reg01: base=0x000000000 ( 0MB), size= 512MB, count=1: write-back // up to 0x0.2000.0000
0x80 :
reg00: base=0x0ffc00000 ( 4092MB), size= 4MB, count=1: write-protect // up to 0x1.0000.0000 reg01: base=0x040000000 ( 1024MB), size= 512MB, count=1: write-back // up to 0x0.6000.0000 reg02: base=0x000000000 ( 0MB), size= 1024MB, count=1: write-back // up to 0.4000.0000
0xc0 :
reg00: base=0x0ffc00000 ( 4092MB), size= 4MB, count=1: write-protect // up to 0x1.0000.0000 reg01: base=0x080000000 ( 2048MB), size= 512MB, count=1: write-back // up to 0x0.a000.0000 reg02: base=0x000000000 ( 0MB), size= 2048MB, count=1: write-back // up to 0x0.8000.0000
Nico told me that a too low BottomIo setting could result in a performance hit:
You should check MTRR allocations before/after the change. If it runs out of registers, that can be bad for performance (depending on whether the CPU supports PAT).
Aside from
mtrr: your CPUs had inconsistent variable MTRR settings mtrr: probably your BIOS does not setup all CPUs. mtrr: corrected configuration.
at Linux kernel log - which is the same for 0x40/0x80/0xc0 and even for 0xd0, there weren't any other warning/error messages and the Linux kernel boot time was the same (if it could serve as a benchmark). In example, I haven't seen any "MTRR allocation failed. Graphics performance may suffer." messages yet. If I set BottomIo to 0x24 or below, a board will simply not boot, but will boot fine with 0x28 or above.
One AMD RX590 GPU needs a 0x20000000-wide MMIO resource to initialize successfully: so 0xe0-(1*0x20)=0xc0 or less BottomIo value is required for 1x RX590 ; 0xe0-(3*0x20)=0x80 or less BottomIo for 3x RX590 ; 0xe0-(5*0xa0)=0x40 or less for 5x RX590. Although none of coreboot-supported AMD boards have more than three PCIe slots, with the help of "PCIe splitters" people may be able to connect more than three GPUs to their board.
So, although I'm fine with changing a BottomIo position from 0x40000000 to 0x80000000, I'd be more happy to do this if there's a good reason: i.e. if still a real danger of performance hit.