Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37064 )
Change subject: 4.12 release notes: Add some explanation behind deprecations ......................................................................
Patch Set 6:
(3 comments)
https://review.coreboot.org/c/coreboot/+/37064/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37064/4//COMMIT_MSG@7 PS4, Line 7: depreciations
deprecations
Done
https://review.coreboot.org/c/coreboot/+/37064/4//COMMIT_MSG@14 PS4, Line 14: notes?
You're correct and this is a good idea, however I think it's outside the scope of this patch which i […]
Ack
https://review.coreboot.org/c/coreboot/+/37064/4/Documentation/releases/core... File Documentation/releases/coreboot-4.12-relnotes.md:
https://review.coreboot.org/c/coreboot/+/37064/4/Documentation/releases/core... PS4, Line 40: Historically the bootblock on x86 platforms has been compiled with : romcc. This means that the generated code only uses CPU registers : and therefore no stack. This 20K+ LOC compiler is limited and hard : to maintain and so is the code that one has to write in that : environment. A different solution is to set up Cache-as-Ram in the : bootblock and run GCC compiled code in the bootblock. The advantages : are increased flexibility and consistency with other architectures as : well as other stages: e.g. printing to console is possible and : VBOOT can run before romstage, making romstage updatable via RW FMAP : regions.
Well the attempt is to design bootblock to be read-only flash region. […]
Done