[coreboot-gerrit] Change in coreboot[master]: mb/intel/adlrvp: Disable dq_pins_interleaved for DDR4/5 RVP

[Subrata Banik (Code Review)]

Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons, Aamir Bohra,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/48078

to look at the new patch set (#2).

Change subject: mb/intel/adlrvp: Disable dq_pins_interleaved for DDR4/5 RVP
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mb/intel/adlrvp: Disable dq_pins_interleaved for DDR4/5 RVP

TEST=Able to pass MRC training on DDR4/5 SKUs

Change-Id: I38fcb17a1be5a8544a17cef8255631b6abef0741
Signed-off-by: Subrata Banik 
---
M src/mainboard/intel/adlrvp/memory.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/48078/2