Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32446 )
Change subject: soc/intel: Add GPI interrupt config register offset info ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/32446/1/src/soc/intel/denverton_ns/gpio.c File src/soc/intel/denverton_ns/gpio.c:
https://review.coreboot.org/#/c/32446/1/src/soc/intel/denverton_ns/gpio.c@99 PS1, Line 99: R_PCH_PCR_GPIO_SC_GPI_IS
Thank you for catching it. Will fix it.
Done
https://review.coreboot.org/#/c/32446/1/src/soc/intel/denverton_ns/gpio.c@10... PS1, Line 100: .gpi_int_en_reg_0 = R_PCH_PCR_GPIO_SC_GPI_IE,
R_PCH_PCR_GPIO_SC_DFX_GPI_IE
Done