Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39969 )
Change subject: nb/intel/sandybridge: Read SPDs only once if measured boot is enabled ......................................................................
Patch Set 6:
(1 comment)
Patch Set 6:
(1 comment)
Looking at the code I cannot easily understand what you are trying to achieve.
https://review.coreboot.org/c/coreboot/+/39969/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39969/6//COMMIT_MSG@10 PS6, Line 10: CBFS
What do you measure?
The SPD file stored in CBFS for memory chips soldered on the mainboard. If present, it will be loaded with mainboard_get_spd(), along with SPD for DIMMs read over smbus.
How do you handle first boot ( with no mrc cache) vs following boots?
The SPD file does not changes as MRC cache does, so if it is "loaded once while used many time", measurement for it will not change.