[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: unlock RTC memory

[Wonkyu Kim (Code Review)]

Hello build bot (Jenkins), Shaunak Saha, Francois Toguo Fotso, Srinidhi N Kaushik, Raj Astekar, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/39710

to look at the new patch set (#6).

Change subject: soc/intel/tigerlake: unlock RTC memory
......................................................................

soc/intel/tigerlake: unlock RTC memory

Unlock RTC memory for OS to update info

BUG=b:153108724
BRANCH=none
TEST=build and boot ripto/volteer and check below crossystem command
which use RTC memory.
crossystem recovery_request=193

Signed-off-by: Wonkyu Kim 
Change-Id: I63cec8a718285f424914e426d0399ed821588dfd
---
M src/soc/intel/tigerlake/fsp_params.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/39710/6