Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43607 )
Change subject: soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU
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Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43607/2/src/mainboard/google/voltee...
File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43607/2/src/mainboard/google/voltee...
PS2, Line 214: register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{
How are these power limits determined? […]
My understanding is that these limits were derived for the Volteer platform, one set of limits for each type (-U or -Y) and # of cores (2 or 4). So they are at least baseline applicable to all variants, although some may require further tuning. Sumeet, is that accurate?
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