Hello Kyösti Mälkki, Patrick Rudolph, Paul Menzel, build bot (Jenkins), Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35313
to look at the new patch set (#3).
Change subject: src/northbridge/amd/pi/00730F01/northbridge.c: enable ACS and AER for PCIe ports ......................................................................
src/northbridge/amd/pi/00730F01/northbridge.c: enable ACS and AER for PCIe ports
Currently it is impossible to enable ACS with AGESA by setting the correct bit for AmdInitMid phase. AGESA code path does not call the right function that enables these functionalities. Disabled ACS result in multiple PCIe devices to be assigned to the same IOMMU group. Without IOMMU group separation the devices cannot be passed through independently.
Enable Access Control Services and Advanced Error Reporting for PCI Express bridges in order to have PCIe devices in separate IOMMU groups for correct passthrough.
TEST=run dmesg on Debian Buster on PC Engines apu2 and check whether PCIe devices have separate groups
Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: I10a8eff0ba37196692f9db6519e498fe535ecd15 --- M src/northbridge/amd/pi/00730F01/northbridge.c 1 file changed, 19 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/35313/3