Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13535
-gerrit
commit d5fc32946690cf2b3eef1dfbaa953d6340107e0d Author: Vladimir Serbinenko phcoder@gmail.com Date: Sun Jan 31 14:00:54 2016 +0100
ivy: Add a possiblity for mainboard early init.
This is needed for stout EC init.
Change-Id: I5c73499c17763229840152a473a2d820802ee2f6 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/mainboard/apple/macbookair4_2/early_southbridge.c | 3 +++ src/mainboard/gigabyte/ga-b75m-d3h/romstage.c | 3 +++ src/mainboard/gigabyte/ga-b75m-d3v/romstage.c | 3 +++ src/mainboard/google/butterfly/romstage.c | 3 +++ src/mainboard/lenovo/t420s/romstage.c | 3 +++ src/mainboard/lenovo/t430s/romstage.c | 3 +++ src/mainboard/lenovo/t520/romstage.c | 3 +++ src/mainboard/lenovo/t530/romstage.c | 3 +++ src/mainboard/lenovo/x220/romstage.c | 3 +++ src/mainboard/lenovo/x230/romstage.c | 3 +++ src/northbridge/intel/sandybridge/raminit_native.h | 1 + src/northbridge/intel/sandybridge/romstage.c | 3 +++ util/autoport/bd82x6x.go | 4 ++++ 13 files changed, 38 insertions(+)
diff --git a/src/mainboard/apple/macbookair4_2/early_southbridge.c b/src/mainboard/apple/macbookair4_2/early_southbridge.c index 576262d..67f89db 100644 --- a/src/mainboard/apple/macbookair4_2/early_southbridge.c +++ b/src/mainboard/apple/macbookair4_2/early_southbridge.c @@ -52,6 +52,9 @@ const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, -1 }, };
+void mainboard_early_init(int s3resume) { +} + void mainboard_get_spd(spd_raw_data *spd) { void *spd_file; diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c index 8278820..ff85ce1 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c +++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c @@ -205,3 +205,6 @@ static void dmi_config(void) DMIBAR32(0x0e2c) = 0x20000000; } #endif + +void mainboard_early_init(int s3resume) { +} diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c index b9a8c09..436f82e 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c +++ b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c @@ -115,3 +115,6 @@ void mainboard_get_spd(spd_raw_data *spd) { read_spd (&spd[2], 0x52); read_spd (&spd[3], 0x53); } + +void mainboard_early_init(int s3resume) { +} diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 6b7562d..40b5e76 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -128,3 +128,6 @@ void mainboard_get_spd(spd_raw_data *spd) { read_spd(&spd[0], 0x50); read_spd(&spd[2], 0x52); } + +void mainboard_early_init(int s3resume) { +} diff --git a/src/mainboard/lenovo/t420s/romstage.c b/src/mainboard/lenovo/t420s/romstage.c index 1080e1c..c020458 100644 --- a/src/mainboard/lenovo/t420s/romstage.c +++ b/src/mainboard/lenovo/t420s/romstage.c @@ -67,3 +67,6 @@ void mainboard_get_spd(spd_raw_data *spd) { read_spd(&spd[0], 0x50); read_spd(&spd[2], 0x51); } + +void mainboard_early_init(int s3resume) { +} diff --git a/src/mainboard/lenovo/t430s/romstage.c b/src/mainboard/lenovo/t430s/romstage.c index f84cfe3..4a99b6d 100644 --- a/src/mainboard/lenovo/t430s/romstage.c +++ b/src/mainboard/lenovo/t430s/romstage.c @@ -67,3 +67,6 @@ void mainboard_get_spd(spd_raw_data *spd) { read_spd(&spd[0], 0x50); read_spd(&spd[2], 0x51); } + +void mainboard_early_init(int s3resume) { +} diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c index eb1d0cf..59bad9a 100644 --- a/src/mainboard/lenovo/t520/romstage.c +++ b/src/mainboard/lenovo/t520/romstage.c @@ -82,3 +82,6 @@ void mainboard_get_spd(spd_raw_data *spd) { read_spd (&spd[0], 0x50); read_spd (&spd[2], 0x51); } + +void mainboard_early_init(int s3resume) { +} diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c index 4003022..23f2704 100644 --- a/src/mainboard/lenovo/t530/romstage.c +++ b/src/mainboard/lenovo/t530/romstage.c @@ -69,3 +69,6 @@ void mainboard_get_spd(spd_raw_data *spd) { read_spd (&spd[0], 0x50); read_spd (&spd[2], 0x51); } + +void mainboard_early_init(int s3resume) { +} diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c index ce3f276..59b3728 100644 --- a/src/mainboard/lenovo/x220/romstage.c +++ b/src/mainboard/lenovo/x220/romstage.c @@ -79,3 +79,6 @@ void mainboard_get_spd(spd_raw_data *spd) { read_spd (&spd[0], 0x50); read_spd (&spd[2], 0x51); } + +void mainboard_early_init(int s3resume) { +} diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c index 316e51d..cf3eb5a 100644 --- a/src/mainboard/lenovo/x230/romstage.c +++ b/src/mainboard/lenovo/x230/romstage.c @@ -82,3 +82,6 @@ void mainboard_get_spd(spd_raw_data *spd) { read_spd (&spd[0], 0x50); read_spd (&spd[2], 0x51); } + +void mainboard_early_init(int s3resume) { +} diff --git a/src/northbridge/intel/sandybridge/raminit_native.h b/src/northbridge/intel/sandybridge/raminit_native.h index bfdbe8d..b41aa85 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.h +++ b/src/northbridge/intel/sandybridge/raminit_native.h @@ -24,5 +24,6 @@ void read_spd(spd_raw_data *spd, u8 addr); void mainboard_get_spd(spd_raw_data *spd); void rcba_config(void); void pch_enable_lpc(void); +void mainboard_early_init(int s3resume);
#endif /* RAMINIT_H */ diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index 34d759f..3d05f8e 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -103,6 +103,9 @@ void main(unsigned long bist) s3resume = southbridge_detect_s3_resume();
post_code(0x38); + + mainboard_early_init(s3resume); + /* Enable SPD ROMs and DDR-III DRAM */ enable_smbus();
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go index c1a9c5f..3e47117 100644 --- a/util/autoport/bd82x6x.go +++ b/util/autoport/bd82x6x.go @@ -358,6 +358,10 @@ void rcba_config(void) guessedMap := GuessSPDMap(ctx)
sb.WriteString(` +void mainboard_early_init(int s3resume) +{ +} + /* FIXME: Put proper SPD map here. */ void mainboard_get_spd(spd_raw_data *spd) {