Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86036?usp=email )
Change subject: [DO NOT MERGE]: Split PSP binaries to get 32M flash ......................................................................
[DO NOT MERGE]: Split PSP binaries to get 32M flash
This patch essentially moves the PSP binaries into the 16M part of the flash that is not accessible by the host (at least by default). Since the host doesn't need to read the PSP binaries we can save some megabytes on the 16M part of the flash that is accessible by the host.
It adds seperate FMAP region which can be used to decide the placement of the PSP binaries on the flash.
Signed-off-by: Maximilian Brune maximilian.brune@9elements.com Change-Id: I88488bfdca7ef8f848ffbab9c68670d8f375e90d --- M src/soc/amd/glinda/Kconfig M src/soc/amd/glinda/Makefile.mk M util/amdfwtool/amdfwtool.c M util/amdfwtool/opts.c 4 files changed, 65 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/86036/1
diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index 68a1b6f..d023101 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -94,6 +94,11 @@
if SOC_AMD_GLINDA
+config AMDFW_SPLIT + bool + default y if COREBOOT_ROMSIZE_KB_32768 + select X86_CUSTOM_BOOTMEDIA + config CHIPSET_DEVICETREE string default "soc/amd/glinda/chipset.cb" diff --git a/src/soc/amd/glinda/Makefile.mk b/src/soc/amd/glinda/Makefile.mk index 7f48581..5205910 100644 --- a/src/soc/amd/glinda/Makefile.mk +++ b/src/soc/amd/glinda/Makefile.mk @@ -131,6 +131,24 @@ APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE
+ifeq ($(CONFIG_AMDFW_SPLIT),y) +regions-for-file-apu/amdfw=AMDFW +$(info region-amdfw $(call regions-for-file,apu/amdfw)) + +FMAP_AMDFW_BODY_LOCATION=$(call get_fmap_value,FMAP_SECTION_AMDFWBODY_START) +FMAP_AMDFW_BODY_PSP_LOCATION=$(call get_fmap_value,FMAP_SECTION_AMDFWBODY_PSP_START) + +OPT_AMDFW_BODY_LOCATION=$(call add_opt_prefix, $(FMAP_AMDFW_BODY_LOCATION), --body-location) +OPT_AMDFW_BODY_PSP_LOCATION=$(call add_opt_prefix, $(FMAP_AMDFW_BODY_PSP_LOCATION), --body-psp-location) + +$(obj)/amdfw.rom.body-psp: $(obj)/amdfw.rom +$(call add_intermediate, add_amdfwbody_psp, $(obj)/amdfw.rom.body-psp) + $(CBFSTOOL) $(obj)/coreboot.pre write -r AMDFWBODY_PSP -f $(obj)/amdfw.rom.body-psp --fill-upward +$(obj)/amdfw.rom.body: $(obj)/amdfw.rom +$(call add_intermediate, add_amdfwbody, $(obj)/amdfw.rom.body) + $(CBFSTOOL) $(obj)/coreboot.pre write -r AMDFWBODY -f $(obj)/amdfw.rom.body --fill-upward +endif # CONFIG_AMDFW_SPLIT + ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) # type = 0x6B - PSP Shared memory location ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0) @@ -230,7 +248,9 @@ $(OPT_EFS_SPI_MICRON_FLAG) \ --config $(CONFIG_AMDFW_CONFIG_FILE) \ --flashsize $(CONFIG_ROM_SIZE) \ - $(OPT_RECOVERY_AB_SINGLE_COPY) + $(OPT_RECOVERY_AB_SINGLE_COPY) \ + $(OPT_AMDFW_BODY_PSP_LOCATION) \ + $(OPT_AMDFW_BODY_LOCATION) \
$(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ $(PSP_VERSTAGE_FILE) \ diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 9c6615c..798993d 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -969,6 +969,8 @@ ctx->current_table = current_table_save; }
+static ssize_t body_psp_size = 0; //TODO put into context + static void integrate_psp_firmwares(context *ctx, amd_fw_entry *fw_table, uint32_t cookie, @@ -1023,6 +1025,13 @@ ctx->current_table = BUFF_TO_RUN_MODE(*ctx, pspdir, AMD_ADDR_REL_BIOS); adjust_current_pointer(ctx, 0, TABLE_ALIGNMENT);
+ uintptr_t saved_table_ptr = ctx->current; + if (cb_config->efs_location != cb_config->body_location) { + set_current_pointer(ctx, cb_config->body_psp_location + body_psp_size); + adjust_current_pointer(ctx, 0, TABLE_ALIGNMENT); + printf("before: %d\n", ctx->current); + } + for (i = 0, count = 0; fw_table[i].type != AMD_FW_INVALID; i++) { if (!(fw_table[i].level & level)) continue; @@ -1118,6 +1127,10 @@ } }
+ if (cb_config->efs_location != cb_config->body_location) { + body_psp_size = ctx->current - cb_config->body_psp_location; + set_current_pointer(ctx, saved_table_ptr); + } fill_dir_header(pspdir, count, ctx); ctx->current_table = current_table_save; } @@ -1881,11 +1894,19 @@ ssize_t bytes;
bytes = write_body(cb_config.output, BUFF_OFFSET(ctx, cb_config.body_location), - ctx.current - cb_config.body_location); + ctx.current - cb_config.body_location, ".body"); if (bytes != ctx.current - cb_config.body_location) { fprintf(stderr, "Error: Writing body\n"); retval = 1; } + + printf("body_psp_offset: %d\n", cb_config.body_psp_location); + printf("body_psp_size: %ld\n", body_psp_size); + bytes = write_body(cb_config.output, BUFF_OFFSET(ctx, cb_config.body_psp_location), body_psp_size, ".body-psp"); + if (bytes != body_psp_size) { + fprintf(stderr, "Error: Writing body psp\n"); + retval = 1; + } }
if (cb_config.manifest_file) { diff --git a/util/amdfwtool/opts.c b/util/amdfwtool/opts.c index 62bbc97..0c07294 100644 --- a/util/amdfwtool/opts.c +++ b/util/amdfwtool/opts.c @@ -55,6 +55,7 @@ AMDFW_OPT_OUTPUT, AMDFW_OPT_FLASHSIZE, AMDFW_OPT_LOCATION, + AMDFW_OPT_PSP_LOCATION, AMDFW_OPT_ANYWHERE, AMDFW_OPT_SHAREDMEM, AMDFW_OPT_SHAREDMEM_SIZE, @@ -120,6 +121,7 @@ {"spi-speed", required_argument, 0, LONGOPT_SPI_SPEED }, {"spi-micron-flag", required_argument, 0, LONGOPT_SPI_MICRON_FLAG }, {"body-location", required_argument, 0, AMDFW_OPT_BODY_LOCATION }, + {"body-psp-location", required_argument, 0, AMDFW_OPT_PSP_LOCATION }, // location of PSP firmware blobs (PSP directory still resides in body-location) /* other */ {"output", required_argument, 0, AMDFW_OPT_OUTPUT }, {"flashsize", required_argument, 0, AMDFW_OPT_FLASHSIZE }, @@ -611,7 +613,14 @@ retval = 1; } break; - + case AMDFW_OPT_PSP_LOCATION: + cb_config->body_psp_location = (uint32_t)strtoul(optarg, &tmp, 16); + if (*tmp != '\0') { + fprintf(stderr, "Error: Body PSP Location specified" + " incorrectly (%s)\n\n", optarg); + retval = 1; + } + break; default: break; } @@ -659,6 +668,10 @@ fprintf(stderr, "Error: Body location outside of ROM.\n\n"); return 1; } + if (cb_config->body_psp_location && cb_config->body_psp_location > ctx->rom_size) { + fprintf(stderr, "Error: Body PSP location outside of ROM.\n\n"); + return 1; + }
if (!cb_config->efs_location && cb_config->body_location) { fprintf(stderr, "Error AMDFW body location specified without EFS location.\n"); @@ -724,9 +737,9 @@
printf(" AMDFWTOOL Using firmware directory location of address: 0x%08x", cb_config->efs_location); - if (cb_config->body_location != cb_config->efs_location) - printf(" with a split body at: 0x%08x\n", cb_config->body_location); - else + //if (cb_config->body_location != cb_config->efs_location) + // printf(" with a split body at: 0x%08x\n", cb_config->body_location); + //else printf("\n");
if (retval) {