[coreboot-gerrit] [XS] Change in coreboot[main]: arch/riscv: use PMP

[ron minnich (Code Review)]

ron minnich has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81090?usp=email )

Change subject: arch/riscv: use PMP
......................................................................

arch/riscv: use PMP

With this change, a simple S-mode payload works:
1:
li a7, 1
li a0, 48
ecall
j 1b

Without this change, it will not work.

Change-Id: I8d7dd171ee69e83f3b904df38c7e2d36cc46a62e
Signed-off-by: Ronald G Minnich 
---
M src/arch/riscv/payload.c
M src/arch/riscv/pmp.c
2 files changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/81090/1

diff --git a/src/arch/riscv/payload.c b/src/arch/riscv/payload.c
index ee2ee8e..3561171 100644
--- a/src/arch/riscv/payload.c
+++ b/src/arch/riscv/payload.c
@@ -1,9 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <cbmem.h>
 #include <program_loading.h>
 #include <stdint.h>
 #include <arch/boot.h>
 #include <arch/encoding.h>
+#include <arch/pmp.h>
 #include <arch/smp/atomic.h>
 #include <console/console.h>
 #include <vm.h>
@@ -40,6 +42,7 @@

switch (payload_mode) {
    case RISCV_PAYLOAD_MODE_S:
+		setup_pmp(0, (uintptr_t) cbmem_top(), PMP_R|PMP_W|PMP_X);
    	status = INSERT_FIELD(status, MSTATUS_MPP, PRV_S);
    	/* Trap vector base address point to the payload */
    	write_csr(stvec, doit);
diff --git a/src/arch/riscv/pmp.c b/src/arch/riscv/pmp.c
index ee39ac4..86a49bb 100644
--- a/src/arch/riscv/pmp.c
+++ b/src/arch/riscv/pmp.c
@@ -28,6 +28,12 @@
 /* This variable is used to record which entries have been used. */
 static uintptr_t pmp_entry_used_mask;

+/* The architectural spec says that up to 16 PMP entries are available. */
+int pmp_entries_num(void)
+{
+	return 16;
+}
+
 /* helper function used to read pmpcfg[idx] */
 static uintptr_t read_pmpcfg(int idx)
 {