15 Jan
2020
15 Jan
'20
8:51 a.m.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38405 )
Change subject: nb/intel/sandybridge: refactor lane_registers[] ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/38405/2/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/sandybridge.h:
https://review.coreboot.org/c/coreboot/+/38405/2/src/northbridge/intel/sandy... PS2, Line 145: #define LANEBASE_ECC 0x0800 /* ECC lane is in the middle of the data lanes */
i wanted to match the order of the elements in the array in the c file, but you got a point there. […]
Ack
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I774373d231a0f4a2fe82ab7c6f1318fc56bcc678
Gerrit-Change-Number: 38405
Gerrit-PatchSet: 2
Gerrit-Owner: Felix Held felix-coreboot@felixheld.de
Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net
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Gerrit-Comment-Date: Wed, 15 Jan 2020 11:51:28 +0000
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