Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34791 )
Change subject: soc/intel/cannonlake: Speed up postcar loading using intermediate caching ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34791/9/src/soc/intel/cannonlake/ro... File src/soc/intel/cannonlake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/34791/9/src/soc/intel/cannonlake/ro... PS9, Line 167: /* Cache the ROM as WP just below 4GiB. */
[…] Those would be just TSEG marked WB (CB:34995) and the POSTCAR_STAGE=n case (CB:34995 + CB:34791 + CB:34752).
localhost ~ # cbmem -t 56 entries total:
0:1st timestamp 12,896 5:start of verified boot 39,730 (26,834) 503:starting to initialize TPM 40,330 (600) 504:finished TPM initialization 78,131 (37,801) 505:starting to verify keyblock/preamble (RSA) 79,583 (1,451) 506:finished verifying keyblock/preamble (RSA) 94,367 (14,784) 507:starting to verify body (load+SHA2+RSA) 94,369 (2) 508:finished loading body (ignore for x86) 217,020 (122,651) 509:finished calculating body hash (SHA2) 235,692 (18,671) 510:finished verifying body signature (RSA) 238,292 (2,600) 511:starting TPM PCR extend 238,920 (627) 512:finished TPM PCR extend 254,488 (15,568) 513:starting locking TPM 254,488 (0) 514:finished locking TPM 262,797 (8,308) 6:end of verified boot 271,039 (8,242) 13:starting to load romstage 271,057 (18) 14:finished loading romstage 271,058 (0) 1:start of romstage 271,063 (5) 2:before ram initialization 271,104 (41) 950:calling FspMemoryInit 273,942 (2,838) 951:returning from FspMemoryInit 300,002 (26,059) 3:after ram initialization 303,331 (3,329) 15:starting LZMA decompress (ignore for x86) 303,827 (495) 16:finished LZMA decompress (ignore for x86) 338,874 (35,047) 4:end of romstage 340,873 (1,998) 550:starting to load Chrome OS VPD 341,841 (968) 10:start of ramstage 342,241 (400) 30:device enumeration 387,612 (45,370) 954:calling FspSiliconInit 396,130 (8,517) 955:returning from FspSiliconInit 482,587 (86,456) 40:device configuration 498,273 (15,686) 956:calling FspNotify(AfterPciEnumeration) 532,691 (34,418) 957:returning from FspNotify(AfterPciEnumeration) 533,074 (383) 50:device enable 533,263 (188) 60:device initialization 553,018 (19,755) 70:device setup done 585,872 (32,853) 75:cbmem post 586,387 (514) 80:write tables 586,505 (118) 15:starting LZMA decompress (ignore for x86) 589,157 (2,651) 16:finished LZMA decompress (ignore for x86) 589,417 (260) 85:finalize chips 590,043 (626) 90:load payload 603,864 (13,820) 15:starting LZMA decompress (ignore for x86) 604,127 (263) 16:finished LZMA decompress (ignore for x86) 652,009 (47,881) 958:calling FspNotify(ReadyToBoot) 652,518 (509) 959:returning from FspNotify(ReadyToBoot) 655,539 (3,020) 960:calling FspNotify(EndOfFirmware) 655,634 (95) 961:returning from FspNotify(EndOfFirmware) 656,040 (406) 99:selfboot jump 656,509 (469) 1000:depthcharge start 656,528 (18) 1002:RO vboot init 656,640 (112) 1020:vboot select&load kernel 656,644 (3) 1030:finished EC verification 676,932 (20,288) 1040:finished storage device initialization 677,959 (1,026) 1050:finished reading kernel from disk 685,071 (7,112) 1100:finished vboot kernel verification 822,967 (137,895) 1101:jumping to kernel 825,460 (2,493)
Total Time: 812,542