Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38490 )
Change subject: soc/mediatek/mt8183: improve the DRAMC runtime config flow
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Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38490/2/src/soc/mediatek/mt8183/dra...
File src/soc/mediatek/mt8183/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/38490/2/src/soc/mediatek/mt8183/dra...
PS2, Line 350: size_t
u8 (since all other code uses u8 for b)?
https://review.coreboot.org/c/coreboot/+/38490/2/src/soc/mediatek/mt8183/dra...
PS2, Line 362: clrsetbits32
this has changed the logic (set 0x2 instead of 0x3).
Can you move this (and the setbits32 below) to a separate CL, since they should be fixing something instead?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Iea623d1bd1f7d736e81f66f191a1bf8476d30404
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