Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47444 )
Change subject: Doc/relnotes/4.13: Add several relevant changes ......................................................................
Doc/relnotes/4.13: Add several relevant changes
While some of these have little impact, they are worth mentioning here.
Change-Id: Idbf629ae77b8918ff1d93edb7b6c4669bbbe17df Signed-off-by: Angel Pons th3fanbus@gmail.com --- M Documentation/releases/coreboot-4.13-relnotes.md 1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/47444/1
diff --git a/Documentation/releases/coreboot-4.13-relnotes.md b/Documentation/releases/coreboot-4.13-relnotes.md index 8d19067..efb45b0 100644 --- a/Documentation/releases/coreboot-4.13-relnotes.md +++ b/Documentation/releases/coreboot-4.13-relnotes.md @@ -13,6 +13,27 @@ Significant changes -------------------
+### Native refcode implementation for Bay Trail + +Bay Trail no longer needs a refcode binary to function properly. The refcode +was reimplemented as coreboot code, which should be functionally equivalent. +Thus, MRC.bin is now the only required Bay Trail binary executed by coreboot. + +### Unusual config files to build test more code + +There's some new highly-unusual config files, whose only purpose is to coerce +Jenkins into build-testing several disabled-by-default coreboot config options. +This prevents them from silently decaying over time because of build failures. + +### Initial support for Intel Trusted eXecution Technology + +coreboot now supports enabling Intel TXT. Though it's not feature-complete yet, +the code allows successfully launching tboot, a Measured Launch Environment. It +was tested on Haswell using an Asrock B85M Pro4 mainboard with TPM 2.0 on LPC. +Support for other platforms is still work in progress, but is being worked on. +The Haswell MRC.bin needs to be patched so as to enable DPR. The only winning +move is not to play with the MRC.bin, and instead write a replacement for it. + ### Hidden PCI devices
This new functionality takes advantage of the existing 'hidden' keyword in the