[coreboot-gerrit] Change in coreboot[master]: mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39195 )

Change subject: mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP
......................................................................

Patch Set 21:

(2 comments)

https://review.coreboot.org/c/coreboot/+/39195/21/src/mainboard/intel/jasper... 
File src/mainboard/intel/jasperlake_rvp/board_id.c:

https://review.coreboot.org/c/coreboot/+/39195/21/src/mainboard/intel/jasper... 
PS21, Line 33: /* 
trailing whitespace

https://review.coreboot.org/c/coreboot/+/39195/21/src/mainboard/intel/jasper... 
PS21, Line 34:  * Get Board ID via EC I/O port write/read 
trailing whitespace