Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35680 )
Change subject: cpu/qemu-x86: Add x86_64 bootblock support ......................................................................
Patch Set 7:
(4 comments)
https://review.coreboot.org/c/coreboot/+/35680/6/src/cpu/qemu-x86/cache_as_r... File src/cpu/qemu-x86/cache_as_ram_bootblock.S:
https://review.coreboot.org/c/coreboot/+/35680/6/src/cpu/qemu-x86/cache_as_r... PS6, Line 44: movd %mm1, %rdi : shld %rdi, 32 : movd %mm1, %rsi : or %rsi, %rdi : movd %mm2, %rsi
I'm confused about what this is trying to achieve?
Same as code below, move %mm0 - %mm2 into the register that are used as arguments for bootblock_c_entry_bist Check SysV ABI for x86_64.
https://review.coreboot.org/c/coreboot/+/35680/6/src/cpu/x86/64bit/entry64.i... File src/cpu/x86/64bit/entry64.inc:
https://review.coreboot.org/c/coreboot/+/35680/6/src/cpu/x86/64bit/entry64.i... PS6, Line 22: Clobers
Clobbers
Done
https://review.coreboot.org/c/coreboot/+/35680/6/src/cpu/x86/64bit/entry64.i... PS6, Line 33: CONFIG_ARCH_X86_64_PGTBL_LOC
I know the tool that generates the page tables errors out on unaligned page table, but doing it here […]
Done
https://review.coreboot.org/c/coreboot/+/35680/6/util/pgtblgen/pgtblgen.c File util/pgtblgen/pgtblgen.c:
https://review.coreboot.org/c/coreboot/+/35680/6/util/pgtblgen/pgtblgen.c@42 PS6, Line 42: #define RW (1ULL << 1)
The question is whether this will work / is a good idea on hardware. I guess it's ok for now.
Yes, you want to write to memory. If it's not set the memory is read only and you will get a page fault on write.