Andrey Petrov (andrey.petrov@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13861
-gerrit
commit 93ead5f952222393346c3040e87601469901699f Author: Andrey Petrov andrey.petrov@intel.com Date: Sun Feb 28 22:37:15 2016 -0800
arch/x86: Add common assembly code for stages that run in CAR
This adds a few assembly lines that are generic enought to be shared between romstage and verstage that are ran in CAR.
Change-Id: Ie7ef6a02f62627f29a109126d08c68176075bd67 Signed-off-by: Andrey Petrov andrey.petrov@intel.com --- src/arch/x86/carstage_entry.S | 54 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+)
diff --git a/src/arch/x86/carstage_entry.S b/src/arch/x86/carstage_entry.S new file mode 100644 index 0000000..4a601a7 --- /dev/null +++ b/src/arch/x86/carstage_entry.S @@ -0,0 +1,54 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corp. + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +.global _start +_start: + +#define LHLT_DELAY 0x50000 /* I/O delay between post codes on failure */ + /* + * This code is meant to be used for stages that are ran in CAR. + * The assumption is that gdt is already loaded. So in order to + * continue with C code execution we needed to set stack pointer + * and clear CAR_GLOBAL variables that are stage-specific. + */ + + /* reset stack pointer to CAR stack */ + mov $_car_stack_end, %esp + + /* clear CAR_GLOBAL area as it is not shared */ + cld + xor %eax, %eax + movl $(_car_global_end), %ecx + movl $(_car_global_start), %edi + sub %edi, %ecx + rep stosl + + jmp romstage_car_entry + movb $0x69, %ah + jmp .Lhlt + +.Lhlt: + xchg %al, %ah +#if IS_ENABLED(CONFIG_POST_IO) + outb %al, $CONFIG_POST_IO_PORT +#else + post_code(POST_DEAD_CODE) +#endif + movl $LHLT_DELAY, %ecx +.Lhlt_Delay: + outb %al, $0xED + loop .Lhlt_Delay + jmp .Lhlt