[coreboot-gerrit] Change in ...coreboot[master]: cpu/amd/family_10h-family_15h: Remove variable set but not used

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33006 )

Change subject: cpu/amd/family_10h-family_15h: Remove variable set but not used
......................................................................

cpu/amd/family_10h-family_15h: Remove variable set but not used

Change-Id: Ifc63ec5b588f8edcec5eda343ec9694332845045
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33006
Reviewed-by: Angel Pons 
Reviewed-by: Marshall Dawson 
Tested-by: build bot (Jenkins) 
---
M src/cpu/amd/family_10h-family_15h/init_cpus.c
1 file changed, 8 insertions(+), 14 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Marshall Dawson: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 310706b..d6a4725 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -986,7 +986,6 @@
    uint8_t nvram;
    u32 platform;
    uint64_t revision;
-	uint8_t enable_c_states;
    uint8_t enable_cpb;

printk(BIOS_DEBUG, "cpuSetAMDMSR ");
@@ -1062,21 +1061,16 @@
    }

if (revision & (AMD_DR_Ex | AMD_FAM15_ALL)) {
-		enable_c_states = 0;
    	if (CONFIG(HAVE_ACPI_TABLES))
-			if (get_option(&nvram, "cpu_c_states") == CB_SUCCESS)
-				enable_c_states = !!nvram;
-
-		if (enable_c_states) {
-			/* Set up the C-state base address */
-			msr_t c_state_addr_msr;
-			c_state_addr_msr = rdmsr(MSR_CSTATE_ADDRESS);
-			c_state_addr_msr.lo = ACPI_CPU_P_LVL2;	/* CstateAddr = ACPI_CPU_P_LVL2 */
-			wrmsr(MSR_CSTATE_ADDRESS, c_state_addr_msr);
-		}
+			if ((get_option(&nvram, "cpu_c_states") == CB_SUCCESS) &&
+			    (nvram)) {
+				/* Set up the C-state base address */
+				msr_t c_state_addr_msr;
+				c_state_addr_msr = rdmsr(MSR_CSTATE_ADDRESS);
+				c_state_addr_msr.lo = ACPI_CPU_P_LVL2;
+				wrmsr(MSR_CSTATE_ADDRESS, c_state_addr_msr);
+			}
    }
-#else
-	enable_c_states = 0;
 #endif

if (revision & AMD_FAM15_ALL) {