[coreboot-gerrit] [XS] Change in coreboot[main]: mb/emulation/spike-riscv/uart.c: Update UART address

[Maximilian Brune (Code Review)]

Attention is currently required from: Maximilian Brune, Philipp Hug, ron minnich.

Hello Nicholas Chin, Philipp Hug, build bot (Jenkins), ron minnich,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85852?usp=email

to look at the new patch set (#2).

Change subject: mb/emulation/spike-riscv/uart.c: Update UART address
......................................................................

mb/emulation/spike-riscv/uart.c: Update UART address

Spike Simulator commit 191634d2854d implemented a ns16550 serial device
which puts the base address at 0x10000000.

Tested: Start Spike Simulator and see that coreboot prints onto the UART.

Signed-off-by: Maximilian Brune 
Change-Id: I0e3db9d8b141c733bf609f906018096e3594ce83
---
M src/mainboard/emulation/spike-riscv/uart.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/85852/2