[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8195: fix GPIO register offsets

[Rex-BC Chen (Code Review)]

Attention is currently required from: Rex-BC Chen, Yu-Ping Wu.
Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/55163

to look at the new patch set (#5).

Change subject: soc/mediatek/mt8195: fix GPIO register offsets
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soc/mediatek/mt8195: fix GPIO register offsets

Correct the offsets by MT8195 Register Map V0.2-1
chapter: 3.2 GPIO Controller (page 3272)

Control register names:
    PUPD_CFG0
    PU_CFG0

Signed-off-by: Zhiqiang Ma 
Change-Id: I9b0f8a24756092a97933cc9d4ba13a9e79c73e91
---
M src/soc/mediatek/mt8195/include/soc/gpio.h
1 file changed, 43 insertions(+), 43 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/55163/5