Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42134 )
Change subject: src/include: Add PnP/HWM update functions ......................................................................
src/include: Add PnP/HWM update functions
RMW (read/modify/write) ops on PnP devices has never been so simple.
Change-Id: Ica01211af2a9a00aed98880844a836f6b7957b14 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/include/device/pnp.h M src/include/device/pnp_ops.h M src/include/superio/hwm5_conf.h 3 files changed, 51 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/42134/1
diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h index 800bcc0..158d40e 100644 --- a/src/include/device/pnp.h +++ b/src/include/device/pnp.h @@ -133,4 +133,29 @@ outb(value, port + 1); }
+/* + * void pnp_update_index(u16 port, u8 reg, u8 mask, u8 or) + * Description: + * This routine updates indexed I/O registers. The reg byte is written + * to the index register at I/O address = port. The value is then read + * from the data register at I/O address = port + 1. This value is ANDed + * with the mask value and then ORed with the or value. Finally, the + * new value is written to the data register at I/O address = port + 1. + * + * Parameters: + * @param[in] u16 port = The address of the port index register. + * @param[in] u8 reg = The offset within the indexed space. + * @param[in] u8 mask = The mask value to apply to the data register value. + * @param[in] u8 or = The or value to apply to the data register value. + */ +static inline void pnp_update_index(u16 port, u8 reg, u8 mask, u8 or) +{ + outb(reg, port); + + uint8_t value = inb(port + 1); + value &= mask; + value |= or; + outb(value, port + 1); +} + #endif /* DEVICE_PNP_H */ diff --git a/src/include/device/pnp_ops.h b/src/include/device/pnp_ops.h index 0cfdd61..783c3ad 100644 --- a/src/include/device/pnp_ops.h +++ b/src/include/device/pnp_ops.h @@ -22,6 +22,12 @@ return pnp_read_index(dev >> 8, reg); }
+static __always_inline void pnp_update_config( + pnp_devfn_t dev, uint8_t reg, uint8_t mask, uint8_t or) +{ + pnp_update_index(dev >> 8, reg, mask, or); +} + static __always_inline void pnp_set_logical_device(pnp_devfn_t dev) { diff --git a/src/include/superio/hwm5_conf.h b/src/include/superio/hwm5_conf.h index 661f3ee..5e9a142 100644 --- a/src/include/superio/hwm5_conf.h +++ b/src/include/superio/hwm5_conf.h @@ -44,4 +44,24 @@ pnp_write_index(base + 5, reg, value); }
+/* + * void pnp_update_hwm5_index(u16 base, u8 reg, u8 mask, u8 or) + * Description: + * This routine updates indexed I/O registers. The reg byte is written + * to the index register at I/O address = port + 5. The value is then read + * from the data register at I/O address = port + 6. This value is ANDed + * with the mask value and then ORed with the or value. Finally, the + * new value is written to the data register at I/O address = port + 6. + * + * Parameters: + * @param[in] u16 port = The address of the port index register. + * @param[in] u8 reg = The offset within the indexed space. + * @param[in] u8 mask = The mask value to apply to the data register value. + * @param[in] u8 or = The or value to apply to the data register value. + */ +static inline void pnp_update_hwm5_index(u16 base, u8 reg, u8 mask, u8 or) +{ + pnp_update_index(base + 5, reg, mask, or); +} + #endif /* DEVICE_PNP_HWM5_CONF_H */