[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell/early_init.c: Remove invalid register writes

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46683 )

Change subject: nb/intel/haswell/early_init.c: Remove invalid register writes
......................................................................

nb/intel/haswell/early_init.c: Remove invalid register writes

MRC overwrites the value of SSKPD and register 0x6120 is reserved.

Tested on Asrock B85M Pro4, still boots.

Change-Id: I21d9656a7595d47ac8648c08d223b7cbafd213c3
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/haswell/early_init.c
1 file changed, 0 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/46683/1

diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
index 79cc277..a0e4211 100644
--- a/src/northbridge/intel/haswell/early_init.c
+++ b/src/northbridge/intel/haswell/early_init.c
@@ -146,16 +146,6 @@
    reg32 = MCHBAR32(SAPMCTL);
    MCHBAR32(SAPMCTL) = reg32 | 1;

-	/* GPU RC6 workaround for sighting 366252 */
-	reg32 = MCHBAR32(SSKPD + 4);
-	reg32 |= (1UL << 31);
-	MCHBAR32(SSKPD + 4) = reg32;
-
-	/* VLW (Virtual Legacy Wire?) */
-	reg32 = MCHBAR32(0x6120);
-	reg32 &= ~(1 << 0);
-	MCHBAR32(0x6120) = reg32;
-
    reg32 = MCHBAR32(INTRDIRCTL);
    reg32 |= (1 << 4) | (1 << 5);
    MCHBAR32(INTRDIRCTL) = reg32;