Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47400 )
Change subject: mb/siemens/mc_apl1: Use `pci_or_config16` function ......................................................................
mb/siemens/mc_apl1: Use `pci_or_config16` function
Change-Id: I93e09fc9801f6d32cade351bac0cba82f671acfe Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47400 Tested-by: build bot (Jenkins) no-reply@coreboot.org Tested-by: siemens-bot Reviewed-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_apl1/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c 5 files changed, 5 insertions(+), 20 deletions(-)
Approvals: build bot (Jenkins): Verified siemens-bot: Verified Mario Scheithauer: Looks good to me, approved
diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c index bff97ea..0d93563 100644 --- a/src/mainboard/siemens/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/mainboard.c @@ -187,7 +187,6 @@
static void mainboard_final(void *chip_info) { - uint16_t cmd = 0; struct device *dev = NULL;
/* Do board specific things */ @@ -196,9 +195,7 @@ /* Set Master Enable for on-board PCI device. */ dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403f, 0); if (dev) { - cmd = pci_read_config16(dev, PCI_COMMAND); - cmd |= PCI_COMMAND_MASTER; - pci_write_config16(dev, PCI_COMMAND, cmd); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); } /* Set up SPI OPCODE menu before the controller is locked. */ fast_spi_set_opcode_menu(); diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c index e7bc589..000ee08 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c @@ -16,14 +16,11 @@ void variant_mainboard_final(void) { struct device *dev; - uint16_t cmd = 0;
/* Set Master Enable for on-board PCI device. */ dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); if (dev) { - cmd = pci_read_config16(dev, PCI_COMMAND); - cmd |= PCI_COMMAND_MASTER; - pci_write_config16(dev, PCI_COMMAND, cmd); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); } }
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c index 07fa01d..8b1a0e1 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c @@ -22,7 +22,6 @@ void variant_mainboard_final(void) { struct device *dev = NULL; - uint16_t cmd = 0;
/* PIR6 register mapping for PCIe root ports * INTA#->PIRQD#, INTB#->PIRQA#, INTC#->PIRQB#, INTD#-> PIRQC# @@ -43,9 +42,7 @@ /* Set Master Enable for on-board PCI device. */ dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); if (dev) { - cmd = pci_read_config16(dev, PCI_COMMAND); - cmd |= PCI_COMMAND_MASTER; - pci_write_config16(dev, PCI_COMMAND, cmd); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
/* Disable clock outputs 0 and 2-4 (CLKOUT) for upstream * XIO2001 PCIe to PCI Bridge. diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c index e85161b..c0a7d53 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c @@ -20,7 +20,6 @@ void variant_mainboard_final(void) { struct device *dev = NULL; - uint16_t cmd;
/* * PIR6 register mapping for PCIe root ports @@ -50,9 +49,7 @@ /* Set Master Enable for on-board PCI device. */ dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); if (dev) { - cmd = pci_read_config16(dev, PCI_COMMAND); - cmd |= PCI_COMMAND_MASTER; - pci_write_config16(dev, PCI_COMMAND, cmd); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
/* Disable clock outputs 0-3 (CLKOUT) for upstream XIO2001 PCIe * to PCI Bridge. */ diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c index 33160d0..f9345f4 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c @@ -22,7 +22,6 @@ void variant_mainboard_final(void) { struct device *dev = NULL; - uint16_t cmd = 0;
/* PIR6 register mapping for PCIe root ports * INTA#->PIRQD#, INTB#->PIRQA#, INTC#->PIRQB#, INTD#-> PIRQC# @@ -43,9 +42,7 @@ /* Set Master Enable for on-board PCI device. */ dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); if (dev) { - cmd = pci_read_config16(dev, PCI_COMMAND); - cmd |= PCI_COMMAND_MASTER; - pci_write_config16(dev, PCI_COMMAND, cmd); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
/* Disable clock outputs 0-3 (CLKOUT) for upstream * XIO2001 PCIe to PCI Bridge.