[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Refactor meminit code

[Tim Wawrzynczak (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Subrata Banik, Balaji Manigandan, Patrick Rudolph, EricR Lai,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/48860

to look at the new patch set (#2).

Change subject: soc/intel/alderlake: Refactor meminit code
......................................................................

soc/intel/alderlake: Refactor meminit code

Align ADL's memory initialization code with TGL; this allows mainboards
to e.g. more easily align the CPU<->DRAM DQ pin mapping between the data
structure and the schematic.

BUG=b:172978729
TEST=abuild intel/adlrvp

Signed-off-by: Tim Wawrzynczak 
Change-Id: I2b75e856f1f2aa34bb7a91913147faf3037e7cfb
---
M src/mainboard/intel/adlrvp/include/baseboard/variants.h
M src/mainboard/intel/adlrvp/memory.c
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
M src/soc/intel/alderlake/include/soc/meminit.h
M src/soc/intel/alderlake/meminit.c
5 files changed, 517 insertions(+), 259 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/48860/2