coreboot-gerrit April 2025

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[XS] Change in coreboot[main]: security/vboot: Add option for enabling ADB over network via GBB flag
by Subrata Banik (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Jon Murphy, Julius Werner, Kapil Porwal, Yu-Ping Wu. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/87031?usp=email ) Change subject: security/vboot: Add option for enabling ADB over network via GBB flag ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > > I mean, we can start building coreboot from the firmware-android branch as well if you think this is important enough. > > yes, we are working on a specific fw branch to build fatcat. > > > Or you can put a line to set this after building in some script, or in an ebuild guarded by a USE flag or something. It does not belong here. (Besides, your patch sets it to `default n` anyway so on its own this patch does nothing?) > > that is correct but for CPFE builders to work, we need to make sure that we are checking that code as well (i.e., the code that edits the GBB bit 31) and this code just meant to do the same. I'm unable to find any other fatcat SoC/MB specific ebuild that would be applicable to set GBB bit 31 for ADB alone. @Jon, ```That being said, I think there's still benefit to flushing it out and landing it on ToT. I'll follow up on my change.``` Are you planning to land your changelist upstream to avoid additional cherry-picking for the firmware branch? If so, then we can also land the coreboot and bboot changelists upstream so that we don't need any special cherry-picking in the firmware branch to enable ADB. Currently, many people overlook overriding the GBB and then claim that ADB isn't working. -- To view, visit https://review.coreboot.org/c/coreboot/+/87031?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb3a69f20ae39baf482a748a00556268d0d0aef7 Gerrit-Change-Number: 87031 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 02:43:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[XS] Change in coreboot[main]: security/vboot: Add option for enabling ADB over network via GBB flag
by Subrata Banik (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Julius Werner, Kapil Porwal, Yu-Ping Wu. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/87031?usp=email ) Change subject: security/vboot: Add option for enabling ADB over network via GBB flag ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I mean, we can start building coreboot from the firmware-android branch as well if you think this is important enough. yes, we are working on a specific fw branch to build fatcat. > Or you can put a line to set this after building in some script, or in an ebuild guarded by a USE flag or something. It does not belong here. (Besides, your patch sets it to `default n` anyway so on its own this patch does nothing?) that is correct but for CPFE builders to work, we need to make sure that we are checking that code as well (i.e., the code that edits the GBB bit 31) and this code just meant to do the same. I'm unable to find any other fatcat SoC/MB specific ebuild that would be applicable to set GBB bit 31 for ADB alone. -- To view, visit https://review.coreboot.org/c/coreboot/+/87031?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb3a69f20ae39baf482a748a00556268d0d0aef7 Gerrit-Change-Number: 87031 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 02:40:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[XS] Change in coreboot[main]: security/vboot: Add option for enabling ADB over network via GBB flag
by Jon Murphy (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Kapil Porwal, Subrata Banik, Yu-Ping Wu. Jon Murphy has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/87031?usp=email ) Change subject: security/vboot: Add option for enabling ADB over network via GBB flag ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I mean, we can start building coreboot from the firmware-android branch as well if you think this is […] FWIW coreboot is already built from the branch: https://chrome-internal.googlesource.com/chromeos/manifest-internal/+/refs/… If those two changes were placed directly in the firmware-android-15949.B branch, we would get the same benefit, and coreboot would continue being cherry-picked. That being said, I think there's still benefit to flushing it out and landing it on ToT. I'll follow up on my change. -- To view, visit https://review.coreboot.org/c/coreboot/+/87031?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb3a69f20ae39baf482a748a00556268d0d0aef7 Gerrit-Change-Number: 87031 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 02:38:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang. Gareth Yu has uploaded a new patch set (#28) to the change originally created by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING According to the analysis results, resetting the DSI DPHY to default during a warm boot is needed if 'You are in developer mode' needs to be displayed on the screen in a system using the MIPI-DSI panel. DPHY_0_CLOCK_LANE_TIMING -- address:0x162180, size: 32 bits [31]: CLK_PREPARE Override. 0:HW maintains, 1:SW overrides [30..28]: CLK_PREPARE [27]: CLK_ZERO Override. 0:HW maintains, 1:SW overrides [23..20]: CLK_ZERO [19]: CLK_PRE Override. 0:HW maintains, 1:SW overrides [17..16]: CLK_PRE [15]: CLK_POST Override. 0:HW maintains, 1:SW overrides [10..8]: CLK_POST [7]: CLK_TRAIL Override. 0:HW maintains, 1:SW overrides [2..0]: CLK_TRAIL BUG=b:397805262 TEST=Able to show 'You are in developer mode' Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Signed-off-by: Gareth Yu <gareth.yu(a)intel.com> --- M src/mainboard/google/brya/variants/meliks/Makefile.mk A src/mainboard/google/brya/variants/meliks/ramstage.c 2 files changed, 58 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/86838/28 -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 28 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com>

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang. Gareth Yu has uploaded a new patch set (#27) to the change originally created by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING According to the analysis results, resetting the DSI DPHY to default during a warm boot is needed if 'You are in developer mode' needs to be displayed on the screen in a system using the MIPI-DSI panel. DPHY_0_CLOCK_LANE_TIMING -- address:0x162180, size: 32 bits [31]: CLK_PREPARE Override. 0:HW maintains, 1:SW overrides [30..28]: CLK_PREPARE [27]: CLK_ZERO Override. 0:HW maintains, 1:SW overrides [23..20]: CLK_ZERO [19]: CLK_PRE Override. 0:HW maintains, 1:SW overrides [17..16]: CLK_PRE [15]: CLK_POST Override. 0:HW maintains, 1:SW overrides [10..8]: CLK_POST [7]: CLK_TRAIL Override. 0:HW maintains, 1:SW overrides [2..0]: CLK_TRAIL BUG=b:397805262 TEST=Able to show 'You are in developer mode' Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Signed-off-by: Gareth Yu <gareth.yu(a)intel.com> --- M src/mainboard/google/brya/variants/meliks/Makefile.mk A src/mainboard/google/brya/variants/meliks/ramstage.c 2 files changed, 58 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/86838/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 27 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8189: Add NOR-Flash support
by Yidi Lin (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Hung-Te Lin, Vince Liu, Yu-Ping Wu. Yidi Lin has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/86997?usp=email ) Change subject: soc/mediatek/mt8189: Add NOR-Flash support ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86997?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3a5b7682e4093f9eddf825bc57267b0180cf8b3c Gerrit-Change-Number: 86997 Gerrit-PatchSet: 2 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 01:58:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/brya: Enable use_gpio_for_status for touchscreen
by Eric Lai (Code Review) 01 Apr '25

01 Apr '25

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86876?usp=email ) ( 4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/brya: Enable use_gpio_for_status for touchscreen ...................................................................... mb/google/brya: Enable use_gpio_for_status for touchscreen The _STA method of touchscreen's power resource currently always returns true. This causes the touchscreen to be powered on by the kernel in a boot critical path (in acpi_bus_init_power) and block the boot for a while due to the long (~300ms depending on variants) sleeps in the _ON method of the power resource. To prevent it, enable use_gpio_for_status so that the implementation of _STA returns the touchscreen's actual power state and the kernel powers it on in another place that doesn't block boot. The similar change has already been made to mb/google/brya/var/redrix in commit d0367e38a9e5 ("mb/google/brya/var/redrix: Enable use_gpio_for_status for touchscreen") (CB:86749). This change applies it to all the other non-4es brya variants with touchscreen. BUG=b:397355818 TEST=Dump SSDT and check that the _STA method of touchscreen (i2c3) PowerResource doesn't always return true. TEST=Check that touchscreen works with the change. TEST=Check that kernel sleep during ACPI initialization is removed by checking the timestamps of 'New power resource' logs from ACPI in /var/log/messages. TEST=(Tested above on crota) Change-Id: I068faa97089ce0011727325ffc868450572bdf58 Signed-off-by: Momoko Hattori <momohatt(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86876 Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: Sam McNally <sammc(a)google.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/anahera/overridetree.cb M src/mainboard/google/brya/variants/brya0/overridetree.cb M src/mainboard/google/brya/variants/crota/overridetree.cb M src/mainboard/google/brya/variants/dochi/overridetree.cb M src/mainboard/google/brya/variants/felwinter/overridetree.cb M src/mainboard/google/brya/variants/gaelin/overridetree.cb M src/mainboard/google/brya/variants/gimble/overridetree.cb M src/mainboard/google/brya/variants/kano/overridetree.cb M src/mainboard/google/brya/variants/marasov/overridetree.cb M src/mainboard/google/brya/variants/mithrax/overridetree.cb M src/mainboard/google/brya/variants/nova/overridetree.cb M src/mainboard/google/brya/variants/omnigul/overridetree.cb M src/mainboard/google/brya/variants/primus/overridetree.cb M src/mainboard/google/brya/variants/skolas/overridetree.cb M src/mainboard/google/brya/variants/taeko/overridetree.cb M src/mainboard/google/brya/variants/taniks/overridetree.cb M src/mainboard/google/brya/variants/vell/overridetree.cb M src/mainboard/google/brya/variants/volmar/overridetree.cb M src/mainboard/google/brya/variants/zydron/overridetree.cb 19 files changed, 29 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved Sam McNally: Looks good to me, approved Kapil Porwal: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index 95787ee..2670e11 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -281,6 +281,7 @@ register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "has_power_resource" = "true" + register "use_gpio_for_status" = "true" device i2c 10 on end end chip drivers/i2c/hid @@ -295,6 +296,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" register "generic.enable_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 40 on end end diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 3212a5b6..24612c1 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -955,6 +955,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x10 on end end @@ -974,6 +975,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x5d on end end @@ -991,6 +993,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" register "generic.enable_delay_ms" = "7" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x00" device i2c 5c on end end diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb index 7b0fd59..a55c68c 100644 --- a/src/mainboard/google/brya/variants/crota/overridetree.cb +++ b/src/mainboard/google/brya/variants/crota/overridetree.cb @@ -280,6 +280,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x16 on end end diff --git a/src/mainboard/google/brya/variants/dochi/overridetree.cb b/src/mainboard/google/brya/variants/dochi/overridetree.cb index f74db6e..8a10a7e 100644 --- a/src/mainboard/google/brya/variants/dochi/overridetree.cb +++ b/src/mainboard/google/brya/variants/dochi/overridetree.cb @@ -259,6 +259,7 @@ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" register "generic.enable_delay_ms" = "12" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 41 on end end @@ -276,6 +277,7 @@ register "generic.stop_delay_ms" = "150" register "generic.stop_off_delay_ms" = "2" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb index ee8b584..1865ac6 100644 --- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb +++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb @@ -304,6 +304,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end diff --git a/src/mainboard/google/brya/variants/gaelin/overridetree.cb b/src/mainboard/google/brya/variants/gaelin/overridetree.cb index 014be97..b7bd9f0 100644 --- a/src/mainboard/google/brya/variants/gaelin/overridetree.cb +++ b/src/mainboard/google/brya/variants/gaelin/overridetree.cb @@ -209,6 +209,7 @@ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C6)" register "generic.enable_delay_ms" = "6" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" device i2c 34 on end end end # I2C3 diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb index 3148996..4f1bcdc 100644 --- a/src/mainboard/google/brya/variants/gimble/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb @@ -237,6 +237,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x15 on end end diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index 6e3383e..c832f96 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -434,6 +434,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x10 on end end diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index add5181..392fbdd 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -306,6 +306,7 @@ register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "stop_off_delay_ms" = "1" register "has_power_resource" = "true" + register "use_gpio_for_status" = "true" device i2c 10 on probe TOUCH TOUCH_ELAN0001 end diff --git a/src/mainboard/google/brya/variants/mithrax/overridetree.cb b/src/mainboard/google/brya/variants/mithrax/overridetree.cb index 0e1ba0b..15bebe2 100644 --- a/src/mainboard/google/brya/variants/mithrax/overridetree.cb +++ b/src/mainboard/google/brya/variants/mithrax/overridetree.cb @@ -258,6 +258,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end diff --git a/src/mainboard/google/brya/variants/nova/overridetree.cb b/src/mainboard/google/brya/variants/nova/overridetree.cb index a615fdd..091edd5 100644 --- a/src/mainboard/google/brya/variants/nova/overridetree.cb +++ b/src/mainboard/google/brya/variants/nova/overridetree.cb @@ -218,6 +218,7 @@ register "generic.reset_delay_ms" = "200" register "generic.enable_delay_ms" = "12" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 41 on end end diff --git a/src/mainboard/google/brya/variants/omnigul/overridetree.cb b/src/mainboard/google/brya/variants/omnigul/overridetree.cb index a6c5ecc..20e3d41 100644 --- a/src/mainboard/google/brya/variants/omnigul/overridetree.cb +++ b/src/mainboard/google/brya/variants/omnigul/overridetree.cb @@ -287,6 +287,7 @@ register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "2" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 40 on end end @@ -304,6 +305,7 @@ register "generic.stop_delay_ms" = "150" register "generic.stop_off_delay_ms" = "2" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb index 893b3cf..b2619ee 100644 --- a/src/mainboard/google/brya/variants/primus/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus/overridetree.cb @@ -258,6 +258,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x10 on end end @@ -273,6 +274,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" register "generic.enable_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x40 on end end diff --git a/src/mainboard/google/brya/variants/skolas/overridetree.cb b/src/mainboard/google/brya/variants/skolas/overridetree.cb index c87690c..dc3ef3d 100644 --- a/src/mainboard/google/brya/variants/skolas/overridetree.cb +++ b/src/mainboard/google/brya/variants/skolas/overridetree.cb @@ -954,6 +954,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x10 on end end @@ -973,6 +974,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x5d on end end @@ -990,6 +992,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" register "generic.enable_delay_ms" = "7" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x00" device i2c 5c on end end diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 964d833..ff25f7b 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -478,6 +478,7 @@ # Parameter T4 >= 1ms register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 5d on end end @@ -493,6 +494,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" register "enable_delay_ms" = "1" register "has_power_resource" = "true" + register "use_gpio_for_status" = "true" device i2c 10 on end end end diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index ebe5853..e11793a 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -295,6 +295,7 @@ # Parameter T4 >= 1ms register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 5d on end end @@ -310,6 +311,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" register "enable_delay_ms" = "1" register "has_power_resource" = "true" + register "use_gpio_for_status" = "true" device i2c 10 on end end end diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 6f9b325..273fb0e 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -330,6 +330,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x10 on end end diff --git a/src/mainboard/google/brya/variants/volmar/overridetree.cb b/src/mainboard/google/brya/variants/volmar/overridetree.cb index 96935170..f57b733 100644 --- a/src/mainboard/google/brya/variants/volmar/overridetree.cb +++ b/src/mainboard/google/brya/variants/volmar/overridetree.cb @@ -295,6 +295,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x10 on end end diff --git a/src/mainboard/google/brya/variants/zydron/overridetree.cb b/src/mainboard/google/brya/variants/zydron/overridetree.cb index 0acf490..a3c4f34 100644 --- a/src/mainboard/google/brya/variants/zydron/overridetree.cb +++ b/src/mainboard/google/brya/variants/zydron/overridetree.cb @@ -410,6 +410,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" + register "generic.use_gpio_for_status" = "true" register "hid_desc_reg_offset" = "0x01" device i2c 0x10 on end end -- To view, visit https://review.coreboot.org/c/coreboot/+/86876?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I068faa97089ce0011727325ffc868450572bdf58 Gerrit-Change-Number: 86876 Gerrit-PatchSet: 6 Gerrit-Owner: Momoko Hattori <momohatt(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/rex: Enable use_gpio_for_status for touchscreen
by Momoko Hattori (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Subrata Banik. Momoko Hattori has posted comments on this change by Momoko Hattori. ( https://review.coreboot.org/c/coreboot/+/87001?usp=email ) Change subject: mb/google/rex: Enable use_gpio_for_status for touchscreen ...................................................................... Patch Set 7: (1 comment) Patchset: PS6: @subratabanik@google.com I saw that you're a core coreboot contributor. Would you mind submitting this change? Thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/87001?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibe7681884dc3edfb98c7c179b1af2063e35c4b46 Gerrit-Change-Number: 87001 Gerrit-PatchSet: 7 Gerrit-Owner: Momoko Hattori <momohatt(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 01:39:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/brya: Enable use_gpio_for_status for touchscreen
by Momoko Hattori (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Eric Lai. Momoko Hattori has posted comments on this change by Momoko Hattori. ( https://review.coreboot.org/c/coreboot/+/86876?usp=email ) Change subject: mb/google/brya: Enable use_gpio_for_status for touchscreen ...................................................................... Patch Set 5: (1 comment) Patchset: PS4: @ericllai@google.com I saw that you are a core contributor. Would you mind submitting this change and CB:86877 ? Thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/86876?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I068faa97089ce0011727325ffc868450572bdf58 Gerrit-Change-Number: 86876 Gerrit-PatchSet: 5 Gerrit-Owner: Momoko Hattori <momohatt(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 01:36:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[M] Change in coreboot[main]: soc/mediatek/mt8189: Add USB host support
by Vince Liu (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yu-Ping Wu. Vince Liu has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/87021?usp=email ) Change subject: soc/mediatek/mt8189: Add USB host support ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/87021/comment/1526be54_c621bafe?us… : PS2, Line 14: TEST=build pass > Done Done -- To view, visit https://review.coreboot.org/c/coreboot/+/87021?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5f1b4b3eb178cb9a110b97a2763c8cff5cdf0ddd Gerrit-Change-Number: 87021 Gerrit-PatchSet: 2 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 00:47:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Vince Liu <vince-wl.liu(a)mediatek.com>

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