coreboot-gerrit September 2024

coreboot-gerrit@coreboot.org

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2064 discussions

[S] Change in coreboot[main]: soc/intel/{adl,mtl}: Don't set up SPD on LPDDRx
by Subrata Banik (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Arthur Heymans, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Nick Vaccaro, Rishika Raj, Tarun. Subrata Banik has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84205?usp=email ) Change subject: soc/intel/{adl,mtl}: Don't set up SPD on LPDDRx ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/meteorlake/meminit.c: https://review.coreboot.org/c/coreboot/+/84205/comment/81058612_674e34a1?us… : PS2, Line 209: has_spd = true; > > > > > > Can you help me understand the purpose of `has_spd`? Does it mean the mainboard has an SPD chip and we'll read the hex file using SMBUS? > > > > > > > > > > would need_spd be a better name? LPDDRx DRAM technology does not use SPD and the code for SPD in soc/intel/common is doing doing undefined behavior like overflowing an array. > > > > > > > > Yes, that name sounds better. I'd like to suggest adding a comment that explains the purpose of this variable. People often confuse the SPD chip with the SPD hex data file. The code should make it clear that the SPD chip isn't required to read the SPD hex file (need_spd). > > > > > > No actually it's about SPD data and this code is wrong. The soc/intel/common code is simply wrong for LPDDRx. The loop over channels and dimms per channel is overflowing. There are no DIMMs in LPDDRx which is what need to be addressed. > > > > okay, so when you set `has_spd` or `need_spd`, are you saying that we will read SPD data over SMBUS and for lpddrx, we shall pass SPD hex file ? > > No that's not the issue. CONFIG_DIMM_MAX is 4 which is how large the array is for containing SPD pointers. LPDDRx has 16 bit per channel, so the code thinks there are 8 channels in total. CONFIG_DIMM_PER_CHANNEL is set to 2. The common code loops over channels and dimms per channel so it's overflowing. What is the appropriate fix? do you think. > > https://qa.coreboot.org/job/coreboot-gerrit/263746/testReport/junit/(root)/… is the compilation error with LTO which can detect the buffer overflow. will this work ? ``` git diff diff --git a/src/soc/intel/common/block/memory/meminit.c b/src/soc/intel/common/block/memory/meminit.c index f583213254..cf12aff803 100644 --- a/src/soc/intel/common/block/memory/meminit.c +++ b/src/soc/intel/common/block/memory/meminit.c @@ -189,12 +189,13 @@ void mem_populate_channel_data(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_m struct mem_channel_data *data) { size_t spd_md_len = 0, spd_dimm_len = 0; - bool have_dimms; + bool have_dimms = 0; memset(data, 0, sizeof(*data)); read_spd_md(soc_mem_cfg, spd_info, half_populated, data, &spd_md_len); - have_dimms = read_spd_dimm(memupd, soc_mem_cfg, spd_info, half_populated, data, + if ((info->topo & MEM_TOPO_DIMM_MODULE) + have_dimms = read_spd_dimm(memupd, soc_mem_cfg, spd_info, half_populated, data, &spd_dimm_len); if (data->ch_population_flags == NO_CHANNEL_POPULATED) ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/84205?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib3d4ed8032bb06b6d08fbc2dc4b697df88745243 Gerrit-Change-Number: 84205 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 08:57:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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[M] Change in coreboot[main]: soc/intel: Refactor ITSS macros
by Jayvik Desai (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Arthur Heymans, Christian Walter, Eran Mitrani, Jakub Czapiga, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nick Vaccaro, Patrick Rudolph, Rishika Raj, Subrata Banik, Tarun, Tim Chu, Werner Zeh. Jayvik Desai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84183?usp=email ) Change subject: soc/intel: Refactor ITSS macros ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84183?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6461dc93b0d21bec5429075bc26435bae3754d74 Gerrit-Change-Number: 84183 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 08:56:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/nissa/var/riven: Update GPIO pins for 3rd dmic support
by Jayvik Desai (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: David Wu, Dinesh Gehlot, Nick Vaccaro, Rishika Raj. Jayvik Desai has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/84141?usp=email ) Change subject: mb/google/nissa/var/riven: Update GPIO pins for 3rd dmic support ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84141?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6c8780ce37b5d3987f5cdf6e6e6d0b4896b33230 Gerrit-Change-Number: 84141 Gerrit-PatchSet: 2 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 04 Sep 2024 08:55:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/nissa/var/riven: Disable CNVi WIFI and BT based on fw_config
by Subrata Banik (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: David Wu, Dinesh Gehlot, Nick Vaccaro, Rishika Raj. Subrata Banik has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/83720?usp=email ) Change subject: mb/google/nissa/var/riven: Disable CNVi WIFI and BT based on fw_config ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/riven/fw_config.c: https://review.coreboot.org/c/coreboot/+/83720/comment/6e4b7946_2fabdf23?us… : PS1, Line 70: if (!fw_config_probe(FW_CONFIG(WIFI_TYPE, WIFI_CNVI))) { > It will cause boot fail with "ASSERTION ERROR:file `src/soc/intel/alderlake/fsp_params.c`, line 820", seem like CB:83148. > When fw_config is unprovisioned (CNVi WIFI is disabled), CNVi BT must be turned off. Thanks. What if FW config doesn't exist and we are coming here to probe? -- To view, visit https://review.coreboot.org/c/coreboot/+/83720?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb925c02c73d3630be8b78debf608270b08854fe Gerrit-Change-Number: 83720 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 04 Sep 2024 08:53:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: David Wu <david_wu(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: soc/intel/{adl,mtl}: Don't set up SPD on LPDDRx
by Jayvik Desai (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: Arthur Heymans, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Nick Vaccaro, Rishika Raj, Subrata Banik, Tarun. Jayvik Desai has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84205?usp=email ) Change subject: soc/intel/{adl,mtl}: Don't set up SPD on LPDDRx ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/84205/comment/903d52a0_68d72262?us… : PS3, Line 239: = {}; Maybe use a ```memset``` instead of ```{}``` for default value initialization ? - I don't see anywhere else in the code initializing structs default like this. - since you have now kept the func ```mem_populate_channel_data``` under a condition ( the function was defaulting this variable to zero ), a memset here might be better IMO. this is just a suggestion, ignore it if you think it will break the logic. -- To view, visit https://review.coreboot.org/c/coreboot/+/84205?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib3d4ed8032bb06b6d08fbc2dc4b697df88745243 Gerrit-Change-Number: 84205 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Wed, 04 Sep 2024 08:53:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[NoOp] Change in blobs[main]: 3rdparty/blobs/mb/google/guybrush: Update signed PSP verstage binaries
by Jon Murphy (Code Review) 04 Sep '24

04 Sep '24

Jon Murphy has submitted this change. ( https://review.coreboot.org/c/blobs/+/84181?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: 3rdparty/blobs/mb/google/guybrush: Update signed PSP verstage binaries ...................................................................... 3rdparty/blobs/mb/google/guybrush: Update signed PSP verstage binaries This PSP verstage is compatible with verified boot. * FW Version: 15874.0.0 * PSP Version: 0.11.11.75 BUG=b:338615043 BRANCH=None TEST=Build Dewatt BIOS image and boot to OS. Ensure that the PSP boots in production mode. Change-Id: Ida220410a4b896b746dda74258fa45a51524dbc2 Signed-off-by: Jon Murphy <jpmurphy(a)google.com> --- M mainboard/google/guybrush/dewatt_psp_verstage.signed.bin M mainboard/google/guybrush/guybrush_psp_verstage.signed.bin M mainboard/google/guybrush/nipperkin_psp_verstage.signed.bin 3 files changed, 0 insertions(+), 0 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved Jon Murphy: Verified Rob Barnes: Looks good to me, approved diff --git a/mainboard/google/guybrush/dewatt_psp_verstage.signed.bin b/mainboard/google/guybrush/dewatt_psp_verstage.signed.bin index a2b5bc0..ef2be8f 100644 --- a/mainboard/google/guybrush/dewatt_psp_verstage.signed.bin +++ b/mainboard/google/guybrush/dewatt_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/guybrush/guybrush_psp_verstage.signed.bin b/mainboard/google/guybrush/guybrush_psp_verstage.signed.bin index ccdf85a..8653223 100644 --- a/mainboard/google/guybrush/guybrush_psp_verstage.signed.bin +++ b/mainboard/google/guybrush/guybrush_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/guybrush/nipperkin_psp_verstage.signed.bin b/mainboard/google/guybrush/nipperkin_psp_verstage.signed.bin index 28468f7..784ed67 100644 --- a/mainboard/google/guybrush/nipperkin_psp_verstage.signed.bin +++ b/mainboard/google/guybrush/nipperkin_psp_verstage.signed.bin Binary files differ -- To view, visit https://review.coreboot.org/c/blobs/+/84181?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ida220410a4b896b746dda74258fa45a51524dbc2 Gerrit-Change-Number: 84181 Gerrit-PatchSet: 3 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-CC: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com>

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[NoOp] Change in blobs[main]: 3rdparty/blobs/mb/google/zork: Update signed PSP verstage binaries
by Jon Murphy (Code Review) 04 Sep '24

04 Sep '24

Jon Murphy has submitted this change. ( https://review.coreboot.org/c/blobs/+/84180?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: 3rdparty/blobs/mb/google/zork: Update signed PSP verstage binaries ...................................................................... 3rdparty/blobs/mb/google/zork: Update signed PSP verstage binaries This PSP verstage is compatible with verified boot. * FW Version: 15826.0.0 * PSP Version: 0.8.C.7B BUG=b:330536985, b:293011193, b:259649666 BRANCH=None TEST=Build Vilboz BIOS image and boot to OS. Ensure that the PSP reports boot mode as in production mode. vilboz-rev3 ~ # cbmem -1 | grep -i psp [INFO ] PSP boot mode: Production Change-Id: Ia0473f0a40d9b10d28c863274f3b25bc968b4c7e Signed-off-by: Jon Murphy <jpmurphy(a)google.com> --- D mainboard/google/zork/berknip_psp_verstage.bin.signed A mainboard/google/zork/berknip_psp_verstage.signed.bin D mainboard/google/zork/dalboz_psp_verstage.bin.signed A mainboard/google/zork/dalboz_psp_verstage.signed.bin D mainboard/google/zork/dirinboz_psp_verstage.bin.signed A mainboard/google/zork/dirinboz_psp_verstage.signed.bin D mainboard/google/zork/ezkinil_psp_verstage.bin.signed A mainboard/google/zork/ezkinil_psp_verstage.signed.bin D mainboard/google/zork/gumboz_psp_verstage.bin.signed A mainboard/google/zork/gumboz_psp_verstage.signed.bin D mainboard/google/zork/morphius_psp_verstage.bin.signed A mainboard/google/zork/morphius_psp_verstage.signed.bin D mainboard/google/zork/shuboz_psp_verstage.bin.signed A mainboard/google/zork/shuboz_psp_verstage.signed.bin D mainboard/google/zork/trembyle_psp_verstage.bin.signed A mainboard/google/zork/trembyle_psp_verstage.signed.bin D mainboard/google/zork/vilboz_psp_verstage.bin.signed A mainboard/google/zork/vilboz_psp_verstage.signed.bin D mainboard/google/zork/woomax_psp_verstage.bin.signed A mainboard/google/zork/woomax_psp_verstage.signed.bin 20 files changed, 0 insertions(+), 0 deletions(-) Approvals: Jon Murphy: Verified Matt DeVillier: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved Rob Barnes: Looks good to me, approved diff --git a/mainboard/google/zork/berknip_psp_verstage.bin.signed b/mainboard/google/zork/berknip_psp_verstage.bin.signed deleted file mode 100644 index ffe9816..0000000 --- a/mainboard/google/zork/berknip_psp_verstage.bin.signed +++ /dev/null Binary files differ diff --git a/mainboard/google/zork/berknip_psp_verstage.signed.bin b/mainboard/google/zork/berknip_psp_verstage.signed.bin new file mode 100644 index 0000000..9967182 --- /dev/null +++ b/mainboard/google/zork/berknip_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/zork/dalboz_psp_verstage.bin.signed b/mainboard/google/zork/dalboz_psp_verstage.bin.signed deleted file mode 100644 index 45a7364..0000000 --- a/mainboard/google/zork/dalboz_psp_verstage.bin.signed +++ /dev/null Binary files differ diff --git a/mainboard/google/zork/dalboz_psp_verstage.signed.bin b/mainboard/google/zork/dalboz_psp_verstage.signed.bin new file mode 100644 index 0000000..3966342 --- /dev/null +++ b/mainboard/google/zork/dalboz_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/zork/dirinboz_psp_verstage.bin.signed b/mainboard/google/zork/dirinboz_psp_verstage.bin.signed deleted file mode 100644 index 20f7846..0000000 --- a/mainboard/google/zork/dirinboz_psp_verstage.bin.signed +++ /dev/null Binary files differ diff --git a/mainboard/google/zork/dirinboz_psp_verstage.signed.bin b/mainboard/google/zork/dirinboz_psp_verstage.signed.bin new file mode 100644 index 0000000..26372a8 --- /dev/null +++ b/mainboard/google/zork/dirinboz_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/zork/ezkinil_psp_verstage.bin.signed b/mainboard/google/zork/ezkinil_psp_verstage.bin.signed deleted file mode 100644 index f6bcb60..0000000 --- a/mainboard/google/zork/ezkinil_psp_verstage.bin.signed +++ /dev/null Binary files differ diff --git a/mainboard/google/zork/ezkinil_psp_verstage.signed.bin b/mainboard/google/zork/ezkinil_psp_verstage.signed.bin new file mode 100644 index 0000000..53d28fd --- /dev/null +++ b/mainboard/google/zork/ezkinil_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/zork/gumboz_psp_verstage.bin.signed b/mainboard/google/zork/gumboz_psp_verstage.bin.signed deleted file mode 100644 index 2e67e2a..0000000 --- a/mainboard/google/zork/gumboz_psp_verstage.bin.signed +++ /dev/null Binary files differ diff --git a/mainboard/google/zork/gumboz_psp_verstage.signed.bin b/mainboard/google/zork/gumboz_psp_verstage.signed.bin new file mode 100644 index 0000000..1f5565b --- /dev/null +++ b/mainboard/google/zork/gumboz_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/zork/morphius_psp_verstage.bin.signed b/mainboard/google/zork/morphius_psp_verstage.bin.signed deleted file mode 100644 index 9c349d4..0000000 --- a/mainboard/google/zork/morphius_psp_verstage.bin.signed +++ /dev/null Binary files differ diff --git a/mainboard/google/zork/morphius_psp_verstage.signed.bin b/mainboard/google/zork/morphius_psp_verstage.signed.bin new file mode 100644 index 0000000..6f3867e --- /dev/null +++ b/mainboard/google/zork/morphius_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/zork/shuboz_psp_verstage.bin.signed b/mainboard/google/zork/shuboz_psp_verstage.bin.signed deleted file mode 100644 index 49559c5..0000000 --- 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deleted file mode 100644 index 7535331..0000000 --- a/mainboard/google/zork/vilboz_psp_verstage.bin.signed +++ /dev/null Binary files differ diff --git a/mainboard/google/zork/vilboz_psp_verstage.signed.bin b/mainboard/google/zork/vilboz_psp_verstage.signed.bin new file mode 100644 index 0000000..e64fed8 --- /dev/null +++ b/mainboard/google/zork/vilboz_psp_verstage.signed.bin Binary files differ diff --git a/mainboard/google/zork/woomax_psp_verstage.bin.signed b/mainboard/google/zork/woomax_psp_verstage.bin.signed deleted file mode 100644 index 281e823..0000000 --- a/mainboard/google/zork/woomax_psp_verstage.bin.signed +++ /dev/null Binary files differ diff --git a/mainboard/google/zork/woomax_psp_verstage.signed.bin b/mainboard/google/zork/woomax_psp_verstage.signed.bin new file mode 100644 index 0000000..f966d56 --- /dev/null +++ b/mainboard/google/zork/woomax_psp_verstage.signed.bin Binary files differ -- To view, visit https://review.coreboot.org/c/blobs/+/84180?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ia0473f0a40d9b10d28c863274f3b25bc968b4c7e Gerrit-Change-Number: 84180 Gerrit-PatchSet: 3 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-CC: Alicja Michalska <ahplka19(a)gmail.com>

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[NoOp] Change in blobs[main]: 3rdparty/blobs/mb/google/zork: Update PSP signing token
by Jon Murphy (Code Review) 04 Sep '24

04 Sep '24

Jon Murphy has submitted this change. ( https://review.coreboot.org/c/blobs/+/84179?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: 3rdparty/blobs/mb/google/zork: Update PSP signing token ...................................................................... 3rdparty/blobs/mb/google/zork: Update PSP signing token The new signing token allows signing using signing infrastructure that aligns with more recent AMD programs. BUG=b:310651124 BRANCH=None TEST=Build Vilboz BIOS Image and boot to OS. Ensure that PSP boots in Production mode. Change-Id: Idb11284cf4ef3abcfdd9186d672b995d82c35ad1 Signed-off-by: Jon Murphy <jpmurphy(a)google.com> --- M mainboard/google/zork/PCO_psp_verstagebl_fw_signing.stkn 1 file changed, 0 insertions(+), 0 deletions(-) Approvals: Rob Barnes: Looks good to me, approved Jon Murphy: Verified Karthik Ramasubramanian: Looks good to me, approved Matt DeVillier: Looks good to me, approved diff --git a/mainboard/google/zork/PCO_psp_verstagebl_fw_signing.stkn b/mainboard/google/zork/PCO_psp_verstagebl_fw_signing.stkn index 15596f2..5a856bb 100644 --- a/mainboard/google/zork/PCO_psp_verstagebl_fw_signing.stkn +++ b/mainboard/google/zork/PCO_psp_verstagebl_fw_signing.stkn Binary files differ -- To view, visit https://review.coreboot.org/c/blobs/+/84179?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Idb11284cf4ef3abcfdd9186d672b995d82c35ad1 Gerrit-Change-Number: 84179 Gerrit-PatchSet: 3 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-CC: Alicja Michalska <ahplka19(a)gmail.com>

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[S] Change in coreboot[main]: mb/google/nissa/var/riven: Disable CNVi WIFI and BT based on fw_config
by Eric Lai (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: David Wu, Dinesh Gehlot, Nick Vaccaro, Rishika Raj, Subrata Banik. Eric Lai has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/83720?usp=email ) Change subject: mb/google/nissa/var/riven: Disable CNVi WIFI and BT based on fw_config ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83720?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb925c02c73d3630be8b78debf608270b08854fe Gerrit-Change-Number: 83720 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 04 Sep 2024 08:31:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/nissa/var/riven: Disable CNVi WIFI and BT based on fw_config
by Kapil Porwal (Code Review) 04 Sep '24

04 Sep '24

Attention is currently required from: David Wu, Dinesh Gehlot, Eric Lai, Nick Vaccaro, Rishika Raj, Subrata Banik. Kapil Porwal has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/83720?usp=email ) Change subject: mb/google/nissa/var/riven: Disable CNVi WIFI and BT based on fw_config ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83720?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb925c02c73d3630be8b78debf608270b08854fe Gerrit-Change-Number: 83720 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 04 Sep 2024 08:24:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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