coreboot-gerrit June 2023

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[S] Change in coreboot[master]: [NOTFORMERGE] mb/lenovo/t400: Remove false docking events
by Stefan Reinauer (Code Review) 10 Jun '23

10 Jun '23

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/20908?usp=email ) Change subject: [NOTFORMERGE] mb/lenovo/t400: Remove false docking events ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/20908?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I327002f5626316948c806f4afcb6466575ffc55c Gerrit-Change-Number: 20908 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ycmwfexy <ycmwfexy(a)sharklasers.com> Gerrit-MessageType: abandon

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[XS] Change in coreboot[master]: [NOTFORMERGE] payloads: Set default to GRUB2 and add grub.cfg
by Stefan Reinauer (Code Review) 10 Jun '23

10 Jun '23

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/14013?usp=email ) Change subject: [NOTFORMERGE] payloads: Set default to GRUB2 and add grub.cfg ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/14013?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74eb389442412bbe6336f3c637b23fd127a2e98a Gerrit-Change-Number: 14013 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[XS] Change in coreboot[master]: [not for merge]nb/intel/sandybridge/raminit: Fix wr_t for mr0
by Stefan Reinauer (Code Review) 10 Jun '23

10 Jun '23

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/17503?usp=email ) Change subject: [not for merge]nb/intel/sandybridge/raminit: Fix wr_t for mr0 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/17503?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d93eadc46a5a24f6026256bd09f7dc1b5d5b8a9 Gerrit-Change-Number: 17503 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[L] Change in coreboot[master]: WIP inteltool: Dump GPIO groups in devicetree format
by Stefan Reinauer (Code Review) 10 Jun '23

10 Jun '23

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/19590?usp=email ) Change subject: WIP inteltool: Dump GPIO groups in devicetree format ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/19590?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I159c02dc466d0d2fce8cbd54117cc699c74d1abd Gerrit-Change-Number: 19590 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: [WIP] device/i2c: Move I2C code from device/ into lib/
by Stefan Reinauer (Code Review) 10 Jun '23

10 Jun '23

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/20438?usp=email ) Change subject: [WIP] device/i2c: Move I2C code from device/ into lib/ ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/20438?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id762514b4962b9470fca67828ee00b4dc42aecf8 Gerrit-Change-Number: 20438 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[XS] Change in coreboot[master]: mainboard/google/nocturne: turn off cams in D3
by Stefan Reinauer (Code Review) 10 Jun '23

10 Jun '23

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/28073?usp=email ) Change subject: mainboard/google/nocturne: turn off cams in D3 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/28073?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id52c2499c3b7577f03395cc9ca2460f25b80e13f Gerrit-Change-Number: 28073 Gerrit-PatchSet: 1 Gerrit-Owner: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/gpio: add support to the function - gpio_get_output().
by Marco Chen (Code Review) 10 Jun '23

10 Jun '23

Hello Marco Chen, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/34190 to review the following change. Change subject: soc/intel/gpio: add support to the function - gpio_get_output(). ...................................................................... soc/intel/gpio: add support to the function - gpio_get_output(). BUG=b:137033609 BRANCH=octopus TEST=build image and verify on the DUT to check returned value. Change-Id: I85bfd66c32528dc1191dc8896322c5894f5cfc02 Signed-off-by: Marco Chen <marcochen(a)google.com> --- M src/soc/intel/common/block/gpio/gpio.c 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/34190/1 diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index 7ebf05a..a53e16a 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -402,6 +402,18 @@ return !!(reg & PAD_CFG0_RX_STATE); } +int gpio_get_output(gpio_t gpio_num) +{ + const struct pad_community *comm = gpio_get_community(gpio_num); + uint16_t config_offset; + uint32_t reg; + + config_offset = pad_config_offset(comm, gpio_num); + reg = pcr_read32(comm->port, config_offset); + + return !!(reg & PAD_CFG0_TX_STATE); +} + void gpio_set(gpio_t gpio_num, int value) { const struct pad_community *comm = gpio_get_community(gpio_num); -- To view, visit https://review.coreboot.org/c/coreboot/+/34190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I85bfd66c32528dc1191dc8896322c5894f5cfc02 Gerrit-Change-Number: 34190 Gerrit-PatchSet: 1 Gerrit-Owner: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)chromium.org> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: gpio: Add a function to get current output value of a GPIO.
by Marco Chen (Code Review) 10 Jun '23

10 Jun '23

Hello Marco Chen, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/34189 to review the following change. Change subject: gpio: Add a function to get current output value of a GPIO. ...................................................................... gpio: Add a function to get current output value of a GPIO. Add a new function - gpio_get_output() which can be implemented by SoC/board code to provide the current output value of a GPIO. If not implemented then the default handler will always return 0. BUG=b:137033609 BRANCH=octopus TEST=build octopus variants. Change-Id: Iba67c8426f3049dc1ed0cdbb6561d9cb5ddb81d9 Signed-off-by: Marco Chen <marcochen(a)google.com> --- M src/include/gpio.h M src/lib/gpio.c 2 files changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/34189/1 diff --git a/src/include/gpio.h b/src/include/gpio.h index 0a37ee7..a605f17 100644 --- a/src/include/gpio.h +++ b/src/include/gpio.h @@ -24,6 +24,7 @@ /* The following functions must be implemented by SoC/board code. */ int gpio_get(gpio_t gpio); +int gpio_get_output(gpio_t gpio); void gpio_set(gpio_t gpio, int value); void gpio_input_pulldown(gpio_t gpio); void gpio_input_pullup(gpio_t gpio); diff --git a/src/lib/gpio.c b/src/lib/gpio.c index 8ea3b5e..9e22b63 100644 --- a/src/lib/gpio.c +++ b/src/lib/gpio.c @@ -190,3 +190,9 @@ { return 0; } + +/* Default handler returns 0 because type of gpio_t is unknown */ +__weak int gpio_get_output(gpio_t gpio) +{ + return 0; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/34189 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iba67c8426f3049dc1ed0cdbb6561d9cb5ddb81d9 Gerrit-Change-Number: 34189 Gerrit-PatchSet: 1 Gerrit-Owner: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: sb/intel/bd82x6x/usb_xhci: Lock OC config and refactoring
by Patrick Rudolph (Code Review) 10 Jun '23

10 Jun '23

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34335 ) Change subject: sb/intel/bd82x6x/usb_xhci: Lock OC config and refactoring ...................................................................... sb/intel/bd82x6x/usb_xhci: Lock OC config and refactoring * Add register defines * Set the lock bit in final function * Lock XHCC2 * Remove debug output * Prevent possible NULL pointer dereference The ACCTRL bit is described in "Intel Pentium Processor N3500-series, J2850, J2900, ..." Document Number: 329670-004. Untested. Change-Id: I53fef63de518ae089a6b7ef4483893bbb7c8c44e Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/southbridge/intel/bd82x6x/pch.h M src/southbridge/intel/bd82x6x/usb_xhci.c 2 files changed, 35 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/34335/1 diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index e36cbe2..2c3c947 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -465,6 +465,10 @@ #define RMHWKCTL 0x35b0 /* 32bit */ /* XHCI USB 3.0 */ +#define XHCC 0x40 +#define ACCTRL (1u << 31) +#define XHCC2 0x44 +#define OCCFDONE (1u << 31) #define XOCM 0xc0 /* 32bit */ #define XUSB2PRM 0xd4 /* 32bit */ #define USB3PRM 0xdc /* 32bit */ diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c index 85e450d..561202d 100644 --- a/src/southbridge/intel/bd82x6x/usb_xhci.c +++ b/src/southbridge/intel/bd82x6x/usb_xhci.c @@ -25,30 +25,49 @@ static void usb_xhci_init(struct device *dev) { u32 reg32; + u16 reg16; + u8 reg8; struct southbridge_intel_bd82x6x_config *config = dev->chip_info; - printk(BIOS_DEBUG, "XHCI: Setting up controller.. "); + if (!config) + return; if (config->xhci_overcurrent_mapping) pci_write_config32(dev, XOCM, config->xhci_overcurrent_mapping); - /* lock overcurrent map */ - reg32 = pci_read_config32(dev, 0x44); + /* Load overcurrent map. BIT31 is WO, so don't touch it here. */ + reg32 = pci_read_config8(dev, XHCC2); reg32 |= 1; - pci_write_config32(dev, 0x44, reg32); + pci_write_config8(dev, XHCC2, reg32); pci_write_config32(dev, XUSB2PRM, config->xhci_switchable_ports); pci_write_config32(dev, USB3PRM, config->superspeed_capable_ports); /* Enable clock gating */ - reg32 = pci_read_config32(dev, 0x40); - reg32 &= ~((1 << 20) | (1 << 21)); - reg32 |= (1 << 19) | (1 << 18) | (1 << 17); - reg32 |= (1 << 10) | (1 << 9) | (1 << 8); - reg32 |= (1 << 31); /* lock */ - pci_write_config32(dev, 0x40, reg32); + reg16 = pci_read_config16(dev, XHCC); + reg16 |= (1 << 10) | (1 << 9) | (1 << 8); + pci_write_config16(dev, XHCC, reg16); - printk(BIOS_DEBUG, "done.\n"); + /* BIT31 is WO, so don't touch it here. */ + reg8 = pci_read_config8(dev, XHCC+2); + reg8 &= ~((1 << 4) | (1 << 5)); + reg8 |= (1 << 3) | (1 << 2) | (1 << 1); + pci_write_config8(dev, XHCC+2, reg8); +} + +static void xhci_final(struct device *dev) +{ + u32 reg32; + + /* Lock OC config. BIT31 is WO. */ + reg32 = pci_read_config32(dev, XHCC2); + reg32 |= OCCFDONE; + pci_write_config32(dev, XHCC2, reg32); + + /* Lock xHCI registers. BIT31 is WO. */ + reg32 = pci_read_config32(dev, XHCC); + reg32 |= ACCTRL; + pci_write_config32(dev, XHCC, reg32); } static const char *xhci_acpi_name(const struct device *dev) @@ -68,6 +87,7 @@ .scan_bus = 0, .ops_pci = &xhci_pci_ops, .acpi_name = xhci_acpi_name, + .final = xhci_final, }; static const unsigned short pci_device_ids[] = { 0x1e31, 0 }; -- To view, visit https://review.coreboot.org/c/coreboot/+/34335 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53fef63de518ae089a6b7ef4483893bbb7c8c44e Gerrit-Change-Number: 34335 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/hatch/variants/kohaku: Update tdp_pl1_override value
by Sumeet R Pawnikar (Code Review) 10 Jun '23

10 Jun '23

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34796 ) Change subject: mb/google/hatch/variants/kohaku: Update tdp_pl1_override value ...................................................................... mb/google/hatch/variants/kohaku: Update tdp_pl1_override value Update tdp_pl1_override value from 8W to 15W for CML-U based Kohaku platform. BUG=None BRANCH=None TEST=Build Change-Id: Ide2d6c579557e4a98b9b476774ab91e99c2e2e53 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/34796/1 diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 13025c8..8762d3f 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -1,5 +1,5 @@ chip soc/intel/cannonlake - register "tdp_pl1_override" = "8" + register "tdp_pl1_override" = "15" register "tdp_pl2_override" = "51" register "SerialIoDevMode" = "{ -- To view, visit https://review.coreboot.org/c/coreboot/+/34796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide2d6c579557e4a98b9b476774ab91e99c2e2e53 Gerrit-Change-Number: 34796 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: newchange

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coreboot-gerrit June 2023