coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[master]: soc/intel/xeon_sp: Fix HEST table length
by Ziang Wang (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Tim Chu, Yiwei Tang, Ziang Wang. Hello Arthur Heymans, Christian Walter, Jeff Li, Johnny Lin, Lean Sheng Tan, Nico Huber, Paul Menzel, Tim Chu, Yiwei Tang, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75738?usp=email to look at the new patch set (#2). Change subject: soc/intel/xeon_sp: Fix HEST table length ...................................................................... soc/intel/xeon_sp: Fix HEST table length "current" points to the start of HEST table, so "next - current" already includes the size of its header, no need for increment here. This issue was found on SPR-SP platform. The length of HEST table is now correct with this patch. Change-Id: I6ff1e8e24612b7356772d582ff9a7e53863419db Signed-off-by: Jeff Li <lijinfeng01(a)inspur.com> Signed-off-by: Ziang Wang <ziang.wang(a)intel.com> --- M src/soc/intel/xeon_sp/ras/hest.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/75738/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75738?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ff1e8e24612b7356772d582ff9a7e53863419db Gerrit-Change-Number: 75738 Gerrit-PatchSet: 2 Gerrit-Owner: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Yiwei Tang Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Yiwei Tang Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[master]: arch/x86/smbios: Add weak function for BIOS Vendor in SMBIOS Type0
by Eric Lai (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Felix Held, Jeff Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Martin Roth, Nill Ge, Subrata Banik, Yiwei Tang, Ziang Wang, niehaitao(a)bytedance.com. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75737?usp=email ) Change subject: arch/x86/smbios: Add weak function for BIOS Vendor in SMBIOS Type0 ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: @Martin and Felix, Do we allow to change bios vendor? -- To view, visit https://review.coreboot.org/c/coreboot/+/75737?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dfcca338ffc48b150c966b9aefcefe928704d24 Gerrit-Change-Number: 75737 Gerrit-PatchSet: 1 Gerrit-Owner: Yiwei Tang Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: niehaitao(a)bytedance.com Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: niehaitao(a)bytedance.com Gerrit-Attention: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Yiwei Tang Gerrit-Attention: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 12 Jun 2023 04:09:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/arch/x86/smbios.c: Change smbios_fill_dimm_serial_number function...
by Eric Lai (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Jeff Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nill Ge, Subrata Banik, Yiwei Tang, Ziang Wang, lichenchen.carl, niehaitao(a)bytedance.com. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75736?usp=email ) Change subject: src/arch/x86/smbios.c: Change smbios_fill_dimm_serial_number function to weak ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Serial should read by SPD, why do you want to overwrite it? -- To view, visit https://review.coreboot.org/c/coreboot/+/75736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc28a56a577f98a2974407175783e32a1e234f86 Gerrit-Change-Number: 75736 Gerrit-PatchSet: 1 Gerrit-Owner: Yiwei Tang Gerrit-Reviewer: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Reviewer: niehaitao(a)bytedance.com Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: niehaitao(a)bytedance.com Gerrit-Attention: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Yiwei Tang Gerrit-Attention: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Comment-Date: Mon, 12 Jun 2023 04:06:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/rex/variants/ovis: Enable EC in device tree
by Eric Lai (Code Review) 12 Jun '23

12 Jun '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75577?usp=email ) ( 5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/rex/variants/ovis: Enable EC in device tree ...................................................................... mb/google/rex/variants/ovis: Enable EC in device tree BUG=b:274421383 TEST=util/abuild/abuild -p none -t google/rex -x -a -b ovis Change-Id: I6f3fa6543a4cec8c2562196105f17fbc7831bab7 Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75577 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/rex/variants/ovis/overridetree.cb 1 file changed, 5 insertions(+), 0 deletions(-) Approvals: Kapil Porwal: Looks good to me, approved build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/rex/variants/ovis/overridetree.cb b/src/mainboard/google/rex/variants/ovis/overridetree.cb index bc10cd1..058a240 100644 --- a/src/mainboard/google/rex/variants/ovis/overridetree.cb +++ b/src/mainboard/google/rex/variants/ovis/overridetree.cb @@ -43,5 +43,10 @@ device i2c 50 on end end end + device ref soc_espi on + chip ec/google/chromeec + device pnp 0c09.0 on end + end + end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/75577?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f3fa6543a4cec8c2562196105f17fbc7831bab7 Gerrit-Change-Number: 75577 Gerrit-PatchSet: 7 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/nissa/var/joxer: Configure the external V1p05/Vnn/VnnSx rails
by Eric Lai (Code Review) 12 Jun '23

12 Jun '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75662?usp=email ) Change subject: mb/google/nissa/var/joxer: Configure the external V1p05/Vnn/VnnSx rails ...................................................................... mb/google/nissa/var/joxer: Configure the external V1p05/Vnn/VnnSx rails This patch configures external V1p05/Vnn/VnnSx rails for Joxer to achieve the better power savings. * Enable the external V1p05, Vnn, VnnSx rails in S0i1, S0i2, S0i3, S3, S4, S5 , S0 states. * Set the supported voltage states. * Set the voltage for v1p05 and vnn. * Set the ICC max for v1p05 and vnn. Kit: 646929 - ADL N Platform Design Guide BUG=b:285477026 TEST=Verified all the UPD values are updated with these configs. Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Change-Id: I78d2a885d577f6c1a89ab74c0da7b6544322c0d7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75662 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Baieswara Reddy Sagili <baieswara.reddy.sagili(a)intel.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/mainboard/google/brya/variants/joxer/overridetree.cb 1 file changed, 15 insertions(+), 0 deletions(-) Approvals: Baieswara Reddy Sagili: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved build bot (Jenkins): Verified Sumeet R Pawnikar: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb index 195e4bd..810f54f 100644 --- a/src/mainboard/google/brya/variants/joxer/overridetree.cb +++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb @@ -12,6 +12,21 @@ register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN + # Configure external V1P05/Vnn/VnnSx Rails + register "ext_fivr_settings" = "{ + .configure_ext_fivr = 1, + .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, + .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, + .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, + .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, + .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE, + .v1p05_voltage_mv = 1050, + .vnn_voltage_mv = 780, + .vnn_sx_voltage_mv = 1050, + .v1p05_icc_max_ma = 500, + .vnn_icc_max_ma = 500, + }" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | -- To view, visit https://review.coreboot.org/c/coreboot/+/75662?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78d2a885d577f6c1a89ab74c0da7b6544322c0d7 Gerrit-Change-Number: 75662 Gerrit-PatchSet: 6 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Baieswara Reddy Sagili <baieswara.reddy.sagili(a)intel.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/google/nissa/var/joxer: Disable storage devices based on fw_config
by Eric Lai (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Derek Huang, Felix Held, Henry Sun, Mark Hsieh, Reka Norman, Sam McNally, Shou-Chieh Hsu, Tarun Tuli. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75743?usp=email ) Change subject: mb/google/nissa/var/joxer: Disable storage devices based on fw_config ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/joxer/overridetree.cb: https://review.coreboot.org/c/coreboot/+/75743/comment/a3e8741b_90de5a6e : PS1, Line 2: field DB_USB 0 1 I can't see why you need this, remove? -- To view, visit https://review.coreboot.org/c/coreboot/+/75743?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6920d88dfec86676ff6733146f748e06d4085c49 Gerrit-Change-Number: 75743 Gerrit-PatchSet: 1 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 12 Jun 2023 04:03:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/intel/xeon_sp/spr: Fix memory max capacity per processor
by Eric Lai (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, Felix Singer, Nico Huber, Patrick Rudolph, Tim Chu, Ziang Wang. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75740?usp=email ) Change subject: soc/intel/xeon_sp/spr: Fix memory max capacity per processor ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/xeon_sp/spr/romstage.c: https://review.coreboot.org/c/coreboot/+/75740/comment/9d561558_68faad09 : PS1, Line 277: * Persistent Memory 300 Series mapped as memory) per Socket > I don't understand how to calculate anything from this. What is 3DS? […] Can use this way to do it? https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi… or kind of this instead the number 4/6. https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi… -- To view, visit https://review.coreboot.org/c/coreboot/+/75740?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb892d3b148291b35808d634d63b58b90d456767 Gerrit-Change-Number: 75740 Gerrit-PatchSet: 3 Gerrit-Owner: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 12 Jun 2023 03:56:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/brya/var/osiris: Add Micron MT53E2G32D4NQ-046 WT:C SPD
by Eric Lai (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: David Wu, Lucas Chen, Nick Vaccaro, Tarun Tuli, YH Lin. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75745?usp=email ) Change subject: mb/google/brya/var/osiris: Add Micron MT53E2G32D4NQ-046 WT:C SPD ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75745?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c66a18fd94d9a013710fbc6dc7f1533d808392e Gerrit-Change-Number: 75745 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Mon, 12 Jun 2023 03:46:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/intel/xeon_sp/spr: Fix memory max capacity per processor
by Ziang Wang (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, Felix Singer, Patrick Rudolph, Tim Chu, Ziang Wang. Hello Arthur Heymans, Christian Walter, Felix Singer, Johnny Lin, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Paul Menzel, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75740?usp=email to look at the new patch set (#2). Change subject: soc/intel/xeon_sp/spr: Fix memory max capacity per processor ...................................................................... soc/intel/xeon_sp/spr: Fix memory max capacity per processor The capacity shall be 6*TiB per processor. Change-Id: Ieb892d3b148291b35808d634d63b58b90d456767 Signed-off-by: Wang Hao <wanghao11(a)inspur.com> Signed-off-by: Ziang Wang <ziang.wang(a)intel.com> --- M src/soc/intel/xeon_sp/spr/romstage.c 1 file changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/75740/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75740?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb892d3b148291b35808d634d63b58b90d456767 Gerrit-Change-Number: 75740 Gerrit-PatchSet: 2 Gerrit-Owner: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[master]: mb/google/brya/var/osiris: Add Micron MT53E2G32D4NQ-046 WT:C SPD
by Tyler Wang (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: David Wu, Lucas Chen, Nick Vaccaro, Tarun Tuli, YH Lin. Tyler Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75745?usp=email ) Change subject: mb/google/brya/var/osiris: Add Micron MT53E2G32D4NQ-046 WT:C SPD ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75745?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c66a18fd94d9a013710fbc6dc7f1533d808392e Gerrit-Change-Number: 75745 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Mon, 12 Jun 2023 03:07:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit June 2023