coreboot-gerrit December 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/amd: Add DBG2 ACPI table
by Bao Zheng (Code Review) 01 Dec '23

01 Dec '23

Attention is currently required from: Bao Zheng, Cliff Huang, Felix Held, Fred Reitberger, Jason Glenesk, Lance Zhao, Matt DeVillier, Simon Glass, Tim Wawrzynczak, Zheng Bao. Hello Cliff Huang, Felix Held, Fred Reitberger, Jason Glenesk, Lance Zhao, Matt DeVillier, Simon Glass, Tim Wawrzynczak, Zheng Bao, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79174?usp=email to look at the new patch set (#12). The following approvals got outdated and were removed: Code-Review+1 by Simon Glass, Verified+1 by build bot (Jenkins) Change subject: soc/amd: Add DBG2 ACPI table ...................................................................... soc/amd: Add DBG2 ACPI table Dump the DBG2 table on Linux console. $> acpidump -s ACPI: DBG2 0x0000000000000000 000054 (v00 COREv4 COREBOOT 00000000 **) $> acpidump > acpidump.bin $> acpixtract -a acpidump.bin $> iasl -d dbg2.dat $> cat dbg2.dsl /* * ACPI Data Table [DBG2] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "DBG2" [Debug Port table type 2] [004h 0004 4] Table Length : 00000054 [008h 0008 1] Revision : 00 [009h 0009 1] Checksum : FA [00Ah 0010 6] Oem ID : "COREv4" [010h 0016 8] Oem Table ID : "COREBOOT" [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "CORE" [020h 0032 4] Asl Compiler Revision : 20220331 [024h 0036 4] Info Offset : 0000002C [028h 0040 4] Info Count : 00000001 [02Ch 0044 1] Revision : 00 [02Dh 0045 2] Length : 0028 [02Fh 0047 1] Register Count : 01 [030h 0048 2] Namepath Length : 0002 [032h 0050 2] Namepath Offset : 0026 [034h 0052 2] OEM Data Length : 0000 [Optional field not present] [036h 0054 2] OEM Data Offset : 0000 [Optional field not present] [038h 0056 2] Port Type : 8000 [03Ah 0058 2] Port Subtype : 0012 [03Ch 0060 2] Reserved : 0000 [03Eh 0062 2] Base Address Offset : 0016 [040h 0064 2] Address Size Offset : 0022 [042h 006612] Base Address Register : [Generic Address Structure] [042h 0066 1] Space ID : 00 [SystemMemory] [043h 0067 1] Bit Width : 00 [044h 0068 1] Bit Offset : 00 [045h 0069 1] Encoded Access Width : 03 [DWord Access:32] [046h 0070 8] Address : 00000000FEDC9000 [04Eh 0078 4] Address Size : 00000100 [052h 0082 2] Namepath : "." Raw Table Data: Length 84 (0x54) 00: 44 42 47 32 54 00 00 00 00 FA 43 4F 52 45 76 34 // DBG2T.....COREv4 10: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 20: 31 03 22 20 2C 00 00 00 01 00 00 00 00 28 00 01 // 1." ,........(.. 30: 02 00 26 00 00 00 00 00 00 80 12 00 00 00 16 00 // ..&............. 40: 22 00 00 00 00 03 00 90 DC FE 00 00 00 00 00 01 // "............... 50: 00 00 2E 00 // .... BUG=b:303689867 Change-Id: I3c97a78d1889549421baf0bc1a2e8f959a0f47e2 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/acpi/acpi.c M src/include/acpi/acpi.h M src/soc/amd/common/block/acpi/tables.c 3 files changed, 18 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/79174/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/79174?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3c97a78d1889549421baf0bc1a2e8f959a0f47e2 Gerrit-Change-Number: 79174 Gerrit-PatchSet: 12 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: inteltool/gpio_names/icelake.h: Add SPDX license header
by Nicholas Chin (Code Review) 01 Dec '23

01 Dec '23

Attention is currently required from: Felix Singer, Martin L Roth, Stefan Reinauer. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78628?usp=email ) Change subject: inteltool/gpio_names/icelake.h: Add SPDX license header ...................................................................... Patch Set 1: (2 comments) Patchset: PS1: > You don't need approval. […] In that case I probably could add the rest of the header files? This patch train (which I'll squash) only touched the headers which were originally copied from explicitly GPLv2 marked code, but not the ones that were created afterwards without an explicit license. PS1: > +1 These header files were each added in separate commits originally, and I had made a commit for each of those original commits as I went through them. I'll squash the patch train into this patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/78628?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie897cb238c0c9e89fe677c999cbf1803f5f4609a Gerrit-Change-Number: 78628 Gerrit-PatchSet: 1 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Dec 2023 03:19:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/mediatek/mt8188: Support loading OP-TEE via an SMC
by Yu-Ping Wu (Code Review) 01 Dec '23

01 Dec '23

Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78801?usp=email ) ( 16 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/mediatek/mt8188: Support loading OP-TEE via an SMC ...................................................................... soc/mediatek/mt8188: Support loading OP-TEE via an SMC This patch adds compilation flags to BL31 to support loading OP-TEE via an SMC from rootfs. This patch also reserves 80MB memory space for running the OP-TEE image. BUG=b:246837563 TEST=emerge-geralt coreboot Change-Id: Ic38c8beb59c090ae56c5be6821dd8625435609e9 Signed-off-by: Kiwi Liu <kiwi.liu(a)mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78801 Reviewed-by: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Reviewed-by: Yidi Lin <yidilin(a)google.com> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/mediatek/mt8188/Kconfig M src/soc/mediatek/mt8188/Makefile.inc M src/soc/mediatek/mt8188/soc.c 3 files changed, 7 insertions(+), 1 deletion(-) Approvals: Yu-Ping Wu: Looks good to me, approved Kiwi Liu: Looks good to me, but someone else must approve build bot (Jenkins): Verified Yidi Lin: Looks good to me, approved diff --git a/src/soc/mediatek/mt8188/Kconfig b/src/soc/mediatek/mt8188/Kconfig index 0568cd6..7de64aa 100644 --- a/src/soc/mediatek/mt8188/Kconfig +++ b/src/soc/mediatek/mt8188/Kconfig @@ -22,6 +22,7 @@ select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_SEPARATE_VERSTAGE select VBOOT_RETURN_FROM_VERSTAGE + select VBOOT_DEFINE_WIDEVINE_COUNTERS config DPM_DM_FIRMWARE string diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc index 1426b83..6a643b0 100644 --- a/src/soc/mediatek/mt8188/Makefile.inc +++ b/src/soc/mediatek/mt8188/Makefile.inc @@ -58,7 +58,8 @@ ramstage-y += ../common/tps65132s.c ramstage-y += ../common/usb.c usb.c -BL31_MAKEARGS += PLAT=mt8188 +BL31_MAKEARGS += PLAT=mt8188 SPD=opteed +BL31_MAKEARGS += OPTEE_ALLOW_SMC_LOAD=1 PLAT_XLAT_TABLES_DYNAMIC=1 CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include diff --git a/src/soc/mediatek/mt8188/soc.c b/src/soc/mediatek/mt8188/soc.c index c63b5ca..d0a29c5 100644 --- a/src/soc/mediatek/mt8188/soc.c +++ b/src/soc/mediatek/mt8188/soc.c @@ -14,10 +14,14 @@ #include <soc/sspm.h> #include <symbols.h> +#define OPTEE_ADDRESS 0x43000000 +#define OPTEE_SIZE (80 * MiB) + void bootmem_platform_add_ranges(void) { if (CONFIG(MTK_DFD)) bootmem_add_range(DFD_DUMP_ADDRESS, DFD_DUMP_SIZE, BM_MEM_RESERVED); + bootmem_add_range(OPTEE_ADDRESS, OPTEE_SIZE, BM_MEM_RESERVED); } static void soc_read_resources(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/78801?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic38c8beb59c090ae56c5be6821dd8625435609e9 Gerrit-Change-Number: 78801 Gerrit-PatchSet: 19 Gerrit-Owner: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/google/nissa/var/anraggar: Enable ILITEK touchscreen
by Dolan Liu (Code Review) 01 Dec '23

01 Dec '23

Attention is currently required from: Jianeng Ceng, Nick Vaccaro, Paul Menzel, Reka Norman, Shou-Chieh Hsu, Subrata Banik, Weimin Wu. Dolan Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79164?usp=email ) Change subject: mb/google/nissa/var/anraggar: Enable ILITEK touchscreen ...................................................................... Patch Set 6: Code-Review+1 (1 comment) Patchset: PS6: next phase board, schematics will change to use GPP_C0 control touchpanel power enable only. sensor change to PP3300_Z1. -- To view, visit https://review.coreboot.org/c/coreboot/+/79164?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7dabf205dba616f57ef9717f950eba96282d8e3d Gerrit-Change-Number: 79164 Gerrit-PatchSet: 6 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Fri, 01 Dec 2023 02:53:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/mediatek/mt8188: Support loading OP-TEE via an SMC
by Kiwi Liu (Code Review) 01 Dec '23

01 Dec '23

Attention is currently required from: Hung-Te Lin, Kiwi Liu, Paul Menzel. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78801?usp=email to look at the new patch set (#18). Change subject: soc/mediatek/mt8188: Support loading OP-TEE via an SMC ...................................................................... soc/mediatek/mt8188: Support loading OP-TEE via an SMC This patch adds compilation flags to BL31 to support loading OP-TEE via an SMC from rootfs. This patch also reserves 80MB memory space for running the OP-TEE image. BUG=b:246837563 TEST=emerge-geralt coreboot Change-Id: Ic38c8beb59c090ae56c5be6821dd8625435609e9 Signed-off-by: Kiwi Liu <kiwi.liu(a)mediatek.com> --- M src/soc/mediatek/mt8188/Kconfig M src/soc/mediatek/mt8188/Makefile.inc M src/soc/mediatek/mt8188/soc.c 3 files changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/78801/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/78801?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic38c8beb59c090ae56c5be6821dd8625435609e9 Gerrit-Change-Number: 78801 Gerrit-PatchSet: 18 Gerrit-Owner: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/nissa/var/anraggar: Trim GPIO comments
by Eric Lai (Code Review) 01 Dec '23

01 Dec '23

Attention is currently required from: Nick Vaccaro, Subrata Banik, Weimin Wu. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79321?usp=email ) Change subject: mb/google/nissa/var/anraggar: Trim GPIO comments ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: Batter now, thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/79321?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I05daa4df16b6da3d3f971b75c7c467032e3f854d Gerrit-Change-Number: 79321 Gerrit-PatchSet: 1 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 01 Dec 2023 02:28:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/intel/alderlake: Update LidStatus UPD dynamically
by Eric Lai (Code Review) 01 Dec '23

01 Dec '23

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79352?usp=email ) Change subject: soc/intel/alderlake: Update LidStatus UPD dynamically ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79352?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb1d71bd54837630f36d43a45effc53d35f9cb70 Gerrit-Change-Number: 79352 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 01 Dec 2023 02:27:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/nissa/var/anraggar: Enable ILITEK touchscreen
by Eric Lai (Code Review) 01 Dec '23

01 Dec '23

Attention is currently required from: Dolan Liu, Jianeng Ceng, Nick Vaccaro, Paul Menzel, Reka Norman, Shou-Chieh Hsu, Subrata Banik, Weimin Wu. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79164?usp=email ) Change subject: mb/google/nissa/var/anraggar: Enable ILITEK touchscreen ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79164?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7dabf205dba616f57ef9717f950eba96282d8e3d Gerrit-Change-Number: 79164 Gerrit-PatchSet: 6 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Fri, 01 Dec 2023 02:27:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: libpayload: Fix the stack and data labels
by Julius Werner (Code Review) 01 Dec '23

01 Dec '23

Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79144?usp=email ) Change subject: libpayload: Fix the stack and data labels ...................................................................... libpayload: Fix the stack and data labels We should make sure _stack/_estack and the other labels are consistent. And _data & _edata is also useful to clean up the sensitive data on the data section. BUG=b:248610274 TEST=emerge-cherry libpayload BRANCH=none Cq-Depend: chromium:5052462 Change-Id: I589040f4db60b35813ea9f4ba9503244bd7def00 Signed-off-by: Yi Chou <yich(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79144 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M payloads/libpayload/arch/arm/head.S M payloads/libpayload/arch/arm/libpayload.ldscript M payloads/libpayload/arch/arm64/head.S M payloads/libpayload/arch/arm64/libpayload.ldscript M payloads/libpayload/arch/x86/head.S M payloads/libpayload/arch/x86/libpayload.ldscript 6 files changed, 33 insertions(+), 15 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved build bot (Jenkins): Verified diff --git a/payloads/libpayload/arch/arm/head.S b/payloads/libpayload/arch/arm/head.S index c9a97b5..0640c50 100644 --- a/payloads/libpayload/arch/arm/head.S +++ b/payloads/libpayload/arch/arm/head.S @@ -56,4 +56,4 @@ 1: .word cb_header_ptr 2: -.word _stack +.word _estack diff --git a/payloads/libpayload/arch/arm/libpayload.ldscript b/payloads/libpayload/arch/arm/libpayload.ldscript index 5510218..d60ba8a 100644 --- a/payloads/libpayload/arch/arm/libpayload.ldscript +++ b/payloads/libpayload/arch/arm/libpayload.ldscript @@ -40,29 +40,35 @@ _start = .; .text : { + _text = .; *(.text._entry) *(.text) *(.text.*) + _etext = .; } .rodata : { + _rodata = .; *(.rodata) *(.rodata.*) + _erodata = .; } .data : { + _data = .; *(.data) *(.data.*) + _edata = .; } - _edata = .; - .bss : { + _bss = .; *(.sbss) *(.sbss.*) *(.bss) *(.bss.*) *(COMMON) + _ebss = .; /* Stack and heap */ @@ -72,10 +78,10 @@ . = ALIGN(16); _eheap = .; - _estack = .; + _stack = .; . += CONFIG_LP_STACK_SIZE; . = ALIGN(16); - _stack = .; + _estack = .; } _end = .; diff --git a/payloads/libpayload/arch/arm64/head.S b/payloads/libpayload/arch/arm64/head.S index 0b26fe5..0ebadea 100644 --- a/payloads/libpayload/arch/arm64/head.S +++ b/payloads/libpayload/arch/arm64/head.S @@ -55,4 +55,4 @@ 1: .quad cb_header_ptr 2: -.quad _stack +.quad _estack diff --git a/payloads/libpayload/arch/arm64/libpayload.ldscript b/payloads/libpayload/arch/arm64/libpayload.ldscript index e225aa8..c9881f7 100644 --- a/payloads/libpayload/arch/arm64/libpayload.ldscript +++ b/payloads/libpayload/arch/arm64/libpayload.ldscript @@ -40,31 +40,37 @@ _start = .; .text : { + _text = .; *(.text._entry) *(.text) *(.text.*) + _etext = .; } .rodata : { + _rodata = .; *(.rodata) *(.rodata.*) + _erodata = .; } .data : { + _data = .; *(.data) *(.data.*) + _edata = .; } - _edata = .; - .bss : { *(.ttb_buffer) + _bss = .; *(.sbss) *(.sbss.*) *(.bss) *(.bss.*) *(COMMON) + _ebss = .; /* Stack and heap */ @@ -74,10 +80,10 @@ . = ALIGN(16); _eheap = .; - _estack = .; + _stack = .; . += CONFIG_LP_STACK_SIZE; . = ALIGN(16); - _stack = .; + _estack = .; } _end = .; diff --git a/payloads/libpayload/arch/x86/head.S b/payloads/libpayload/arch/x86/head.S index 87d0037..1e0e4a0 100644 --- a/payloads/libpayload/arch/x86/head.S +++ b/payloads/libpayload/arch/x86/head.S @@ -73,7 +73,7 @@ /* Store current stack pointer and set up new stack. */ movl %esp, %eax - movl $_stack, %esp + movl $_estack, %esp pushl %eax /* Enable special x86 functions if present. */ diff --git a/payloads/libpayload/arch/x86/libpayload.ldscript b/payloads/libpayload/arch/x86/libpayload.ldscript index 2d7e912..0f27ed9 100644 --- a/payloads/libpayload/arch/x86/libpayload.ldscript +++ b/payloads/libpayload/arch/x86/libpayload.ldscript @@ -39,29 +39,35 @@ _start = .; .text : { + _text = .; *(.text._entry) *(.text) *(.text.*) + _etext = .; } .rodata : { + _rodata = .; *(.rodata) *(.rodata.*) + _erodata = .; } .data : { + _data = .; *(.data) *(.data.*) + _edata = .; } - _edata = .; - .bss : { + _bss = .; *(.sbss) *(.sbss.*) *(.bss) *(.bss.*) *(COMMON) + _ebss = .; /* Stack and heap */ @@ -71,10 +77,10 @@ . = ALIGN(16); _eheap = .; - _estack = .; + _stack = .; . += CONFIG_LP_STACK_SIZE; . = ALIGN(16); - _stack = .; + _estack = .; } _end = .; -- To view, visit https://review.coreboot.org/c/coreboot/+/79144?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I589040f4db60b35813ea9f4ba9503244bd7def00 Gerrit-Change-Number: 79144 Gerrit-PatchSet: 9 Gerrit-Owner: Yi Chou <yich(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: mb/google/rex/variants/deku: Complete USB configuration
by Name of user not set (Code Review) 01 Dec '23

01 Dec '23

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Kapil Porwal, Subrata Banik, Tarun. Name of user not set #1005249 has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79356?usp=email ) Change subject: mb/google/rex/variants/deku: Complete USB configuration ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: come help -- To view, visit https://review.coreboot.org/c/coreboot/+/79356?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I90d3d984af6d40efb4553cf5675617700161d2d7 Gerrit-Change-Number: 79356 Gerrit-PatchSet: 1 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Name of user not set #1005249 Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 01 Dec 2023 01:56:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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