coreboot-gerrit October 2023

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB
by Bill XIE (Code Review) 30 Oct '23

30 Oct '23

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[XS] Change in coreboot[main]: Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB
by Bill XIE (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Patrick Georgi, Paul Menzel. Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78623?usp=email ) Change subject: Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB ...................................................................... Patch Set 10: (9 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/78623/comment/27424f5a_fd944af0 : PS9, Line 7: Limit default HEAP_SIZE to 0x80000 > Maybe use decimal numbers: […] Done https://review.coreboot.org/c/coreboot/+/78623/comment/ecb5c104_44516da0 : PS9, Line 9: commit > Commit Done https://review.coreboot.org/c/coreboot/+/78623/comment/198bc184_eefeaee6 : PS9, Line 10: proves to break > breaks Done https://review.coreboot.org/c/coreboot/+/78623/comment/b52d36c8_2edd67c0 : PS9, Line 11: limiting > limit Done https://review.coreboot.org/c/coreboot/+/78623/comment/46f3c5d7_fa70bc42 : PS9, Line 11: platforms, including GM45 and Ivy Bridge, so limiting it to 0x80000. > Please extend, that it’s kept for devices with flattened devicetree. Separated into CB:78815. https://review.coreboot.org/c/coreboot/+/78623/comment/c9fcb9dc_837d727f : PS9, Line 13: HEAP_SIZE overrides greater than 0x80000 prior to the commit above are : restored. > I’d put this in a separate commit. Separated into CB:78815. https://review.coreboot.org/c/coreboot/+/78623/comment/5c7d85c5_2cc653d3 : PS9, Line 24: > Please add: […] Done File src/Kconfig: https://review.coreboot.org/c/coreboot/+/78623/comment/498f5a36_acb97d2d : PS9, Line 755: default 0x80000 > So 512K is the default, except with flattened device tree, which presumably needs 1M. They are separated into CB:78815. File src/northbridge/amd/pi/Kconfig: https://review.coreboot.org/c/coreboot/+/78623/comment/41913708_9c017aaf : PS9, Line 34: default 0xc0000 > And unlike the defaults of 512K or 1M, these devices sorta-randomly need 768K? They are separated into CB:78815. -- To view, visit https://review.coreboot.org/c/coreboot/+/78623?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib1de1eb8487df5bdf004e544d40667833a291515 Gerrit-Change-Number: 78623 Gerrit-PatchSet: 10 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 30 Oct 2023 16:27:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <patrick(a)coreboot.org> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: Revert "soc/intel/{tigerlake,meteorlake}: Check ITBT FW version"
by Sean Rhodes (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Eran Mitrani, Nick Vaccaro, Paul Menzel, Ravishankar Sarawadi, Tarun. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78457?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: Revert "soc/intel/{tigerlake,meteorlake}: Check ITBT FW version" ...................................................................... Patch Set 8: (1 comment) Patchset: PS7: > was added as HW W/A for ADL ONLY What was? The revert? ADL wasn't changed. -- To view, visit https://review.coreboot.org/c/coreboot/+/78457?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib8eb11d36eac4e1c94a3349386442fa3eeeaef37 Gerrit-Change-Number: 78457 Gerrit-PatchSet: 8 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Mon, 30 Oct 2023 16:24:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: Kconfig: Restore HEAP_SIZE overrides greater than 512 KiB
by Bill XIE (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Bill XIE has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78815?usp=email ) Change subject: Kconfig: Restore HEAP_SIZE overrides greater than 512 KiB ...................................................................... Kconfig: Restore HEAP_SIZE overrides greater than 512 KiB Commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large value") breaks S3 resume from TSEG stage cache on many platforms, including GM45 and Ivy Bridge. Now the default value becomes 512 KiB, but a few platforms have greater value before commit 44a48ce7a46c. This commit is to restore them. Signed-off-by: Bill XIE <persmule(a)hardenedlinux.org> Change-Id: I78cd56b0683dd2ef94319a98a720f2da58151626 --- M src/Kconfig M src/northbridge/amd/pi/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig 4 files changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/78815/1 diff --git a/src/Kconfig b/src/Kconfig index cdfe79b..5d962e2 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -751,6 +751,7 @@ config HEAP_SIZE hex + default 0x100000 if FLATTENED_DEVICE_TREE default 0x80000 config STACK_SIZE diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig index 4ffe82a..4518db1 100644 --- a/src/northbridge/amd/pi/Kconfig +++ b/src/northbridge/amd/pi/Kconfig @@ -29,4 +29,8 @@ hex default 0x200000 +config HEAP_SIZE + hex + default 0xc0000 + endif # NORTHBRIDGE_AMD_PI diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index c33f287..796fe4e 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -264,6 +264,10 @@ bool default n +config HEAP_SIZE + hex + default 0xc0000 + config SERIRQ_CONTINUOUS_MODE bool default n diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 0cc8ecd..dadda8d 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -157,6 +157,10 @@ bool default n +config HEAP_SIZE + hex + default 0xc0000 + config EHCI_BAR hex default 0xfef00000 -- To view, visit https://review.coreboot.org/c/coreboot/+/78815?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I78cd56b0683dd2ef94319a98a720f2da58151626 Gerrit-Change-Number: 78815 Gerrit-PatchSet: 1 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB
by Bill XIE (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Bill XIE, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Paul Menzel. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Patrick Georgi, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78623?usp=email to look at the new patch set (#10). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins) Change subject: Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB ...................................................................... Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB Commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large value") breaks S3 resume from TSEG stage cache on many platforms, including GM45 and Ivy Bridge, so limit it to 512 KiB. Please test this against other platforms before merging! Tested: Setting it to 0x80000 results a working S3 resume on Thinkpad X200 and T430, with log in cbmem for S3 resume, while 0xa0000 breaks it. coreboot log during failed resume when (HEAP_SIZE >= 0xa0000) cannot be obtained from EHCI debug, while log in cbmem shows that ramstage is failed to be found in TSEG stage cache, as shown in https://ticket.coreboot.org/issues/512 . Resolves: https://ticket.coreboot.org/issues/512 Signed-off-by: Bill XIE <persmule(a)hardenedlinux.org> Change-Id: Ib1de1eb8487df5bdf004e544d40667833a291515 --- M src/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/78623/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/78623?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib1de1eb8487df5bdf004e544d40667833a291515 Gerrit-Change-Number: 78623 Gerrit-PatchSet: 10 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: Revert "soc/intel/{tigerlake,meteorlake}: Check ITBT FW version"
by Ravishankar Sarawadi (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Eran Mitrani, Nick Vaccaro, Paul Menzel, Sean Rhodes, Tarun. Ravishankar Sarawadi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78457?usp=email ) Change subject: Revert "soc/intel/{tigerlake,meteorlake}: Check ITBT FW version" ...................................................................... Patch Set 8: (1 comment) Patchset: PS7: > > The change was added as HW W/A for ADL ONLY. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78457?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib8eb11d36eac4e1c94a3349386442fa3eeeaef37 Gerrit-Change-Number: 78457 Gerrit-PatchSet: 8 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Mon, 30 Oct 2023 16:21:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: Revert "soc/intel/{tigerlake,meteorlake}: Check ITBT FW version"
by Ravishankar Sarawadi (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Eran Mitrani, Nick Vaccaro, Paul Menzel, Ravishankar Sarawadi, Tarun. Hello Eran Mitrani, Jamie Ryu, Kapil Porwal, Nick Vaccaro, Sean Rhodes, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78457?usp=email to look at the new patch set (#8). Change subject: Revert "soc/intel/{tigerlake,meteorlake}: Check ITBT FW version" ...................................................................... Revert "soc/intel/{tigerlake,meteorlake}: Check ITBT FW version" This reverts commit 2e10a6d6f3ec46bcaf75bd066319d51f001be764. Reason for revert: The FW version check is not supported except for ADL platform. Reverted change broke S0ix functionality and was added as HW W/A for ADL ONLY. BUG=b:306214725 TEST=S0ix cycles on Rex with TBT Device attached. Change-Id: Ib8eb11d36eac4e1c94a3349386442fa3eeeaef37 Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> --- M src/soc/intel/meteorlake/acpi/tcss.asl M src/soc/intel/meteorlake/acpi/tcss_dma.asl M src/soc/intel/tigerlake/acpi/tcss.asl M src/soc/intel/tigerlake/acpi/tcss_dma.asl 4 files changed, 2 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/78457/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/78457?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib8eb11d36eac4e1c94a3349386442fa3eeeaef37 Gerrit-Change-Number: 78457 Gerrit-PatchSet: 8 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: soc/intel/cmn: move configure_descriptor to common code
by Michał Kopeć (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Krystian Hebel, Nick Vaccaro, Subrata Banik. Hello Krystian Hebel, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78809?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/cmn: move configure_descriptor to common code ...................................................................... soc/intel/cmn: move configure_descriptor to common code Move the configure_descriptor function to common code, so that other SoCs beside ADL can make use of it. Change-Id: Icc9e6963d19db9779cb1ec2408babf7a91b8ecd2 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/alderlake/include/soc/bootblock.h M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc R src/soc/intel/common/block/fast_spi/update_descriptor.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h 7 files changed, 25 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/78809/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/78809?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icc9e6963d19db9779cb1ec2408babf7a91b8ecd2 Gerrit-Change-Number: 78809 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: soc/intel/cse: Add API to check if CSE Firmware update is required
by Jérémy Compostella (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Paul Menzel. Jérémy Compostella has uploaded a new patch set (#13) to the change originally created by Anil Kumar K. ( https://review.coreboot.org/c/coreboot/+/78243?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/cse: Add API to check if CSE Firmware update is required ...................................................................... soc/intel/cse: Add API to check if CSE Firmware update is required This patch adds a function to check if a CSE FW update is required during this boot. The function is expected to be used during use cases like Pre-Memory Sign of Life text display to inform user of a CSE Firmware update. Bug=279173035 TEST=build and boot on google/rex board. Call the function in romstage and confirm it returns True during CSE FW update and False otherwise Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> Change-Id: If5fae95786d28d586566881bc4436812754636ae --- M src/soc/intel/common/block/cse/cse_lite.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/78243/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/78243?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5fae95786d28d586566881bc4436812754636ae Gerrit-Change-Number: 78243 Gerrit-PatchSet: 13 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: soc/intel/cmn/blk/include/intelblocks/me_16.h: Add HAP defs for ME 16
by Michał Kopeć (Code Review) 30 Oct '23

30 Oct '23

Attention is currently required from: Krystian Hebel, Michał Żygowski. Hello Krystian Hebel, Michał Żygowski, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78814?usp=email to look at the new patch set (#4). Change subject: soc/intel/cmn/blk/include/intelblocks/me_16.h: Add HAP defs for ME 16 ...................................................................... soc/intel/cmn/blk/include/intelblocks/me_16.h: Add HAP defs for ME 16 Add HAP bit offsets in the Flash Descriptor for ME 16 (ADL-P and ADL-S). These values will be used in follow-up patches to set the HAP bit at run-time in coreboot. Change-Id: I143a756adaebe24d8c5b18151f335542e5c84d7f Co-authored-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Co-authored-by: Michał Kopeć <michal.kopec(a)3mdeb.com> Signed-off-by: Michał Żygowski <michal.kopec(a)3mdeb.com> Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- M src/soc/intel/common/block/include/intelblocks/me_16.h 1 file changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/78814/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/78814?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I143a756adaebe24d8c5b18151f335542e5c84d7f Gerrit-Change-Number: 78814 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2023