coreboot-gerrit October 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: sb/intel/bd82x6x: Improve SLCAP
by Kyösti Mälkki (Code Review) 04 Oct '23

04 Oct '23

Attention is currently required from: Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78228?usp=email ) Change subject: sb/intel/bd82x6x: Improve SLCAP ...................................................................... Patch Set 1: (2 comments) File src/southbridge/intel/bd82x6x/pch.h: https://review.coreboot.org/c/coreboot/+/78228/comment/343a5deb_c24a22e2 : PS1, Line 90: #define D28Fx_SLCAP 0x54 ``` #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ ``` File src/southbridge/intel/bd82x6x/pcie.c: https://review.coreboot.org/c/coreboot/+/78228/comment/42c2876a_14f0e31e : PS1, Line 141: reg32 = pci_read_config32(dev, D28Fx_SLCAP); Probably should utilise and extend ones from pci_def.h here. ``` #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ #define PCI_EXP_SLTCAP_HPC 0x0040 /* Hot-Plug Capable */ #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/78228?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I03aeb0a1ff0041901acc20fe700d3f7995d22366 Gerrit-Change-Number: 78228 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 03 Oct 2023 23:02:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel/bd82x6x: Use helper for PCIe hotplug
by Kyösti Mälkki (Code Review) 04 Oct '23

04 Oct '23

Attention is currently required from: Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78227?usp=email ) Change subject: sb/intel/bd82x6x: Use helper for PCIe hotplug ...................................................................... Patch Set 1: (1 comment) File src/southbridge/intel/bd82x6x/pcie.c: https://review.coreboot.org/c/coreboot/+/78227/comment/00d496b7_6a083c5d : PS1, Line 213: pci_write_config16(dev, 0x42, 0x142); Not in this commit, but we had a define for register 0x42 to previously set the SI Slot Implemented bit. Should this \_write\_ be replaced with some \_update\_ variant to maintain some of the other bits? In this file registers 0x42-0x5B hit the PCI express capability block with offsets defined in PCIe specs. Readability would be largely improved using those. -- To view, visit https://review.coreboot.org/c/coreboot/+/78227?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I25aae540ff2ffa3ec5b93ed9caa838b4e50048d2 Gerrit-Change-Number: 78227 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 03 Oct 2023 22:54:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel/bd82x6x: Disable unused PCIe root ports
by Kyösti Mälkki (Code Review) 04 Oct '23

04 Oct '23

Attention is currently required from: Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78226?usp=email ) Change subject: sb/intel/bd82x6x: Disable unused PCIe root ports ...................................................................... Patch Set 1: (3 comments) File src/southbridge/intel/bd82x6x/pch.h: https://review.coreboot.org/c/coreboot/+/78226/comment/10ff0696_f99e139c : PS1, Line 86: #define D28Fx_XCAP 0x42 I believe these are offsets into PCI express capability block at 0x40 + PCI_EXP_xxx from pci_def.h? ``` #define PCI_EXP_FLAGS 2 /* Capabilities register */ #define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */ ``` https://review.coreboot.org/c/coreboot/+/78226/comment/7b7823d2_d9db48e7 : PS1, Line 88: #define D28Fx_LCTL 0x50 ``` #define PCI_EXP_LNKCTL 16 /* Link Control */ ``` https://review.coreboot.org/c/coreboot/+/78226/comment/2f08936d_edc4553a : PS1, Line 90: #define D28Fx_SLSTS 0x58 Seems like 0x58 would be CTL, 0x5A and 0x5B status? ``` #define PCI_EXP_SLTCTL 24 /* Slot Control */ #define PCI_EXP_SLTSTA 26 /* Slot Status */ ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/78226?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8ccfcab2e0e4faba8322755a4f8c2108d9b007ac Gerrit-Change-Number: 78226 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 03 Oct 2023 22:37:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: util/docker: Fix setting SDK_VERSION
by Felix Singer (Code Review) 04 Oct '23

04 Oct '23

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78141?usp=email ) Change subject: util/docker: Fix setting SDK_VERSION ...................................................................... util/docker: Fix setting SDK_VERSION The `SDK_VERSION` was incorrectly set to itself instead of keeping the `COREBOOT_IMAGE_TAG` variable, leaving it as an empty string. Test: Run `make coreboot-sdk` and see `SDK_VERSION` matches the tag. Fixes: d3a89cdb749a ("util/docker: Replace use of sed with build args") Change-Id: I4c8be7d0f7c1ac82da397e720d13a7075f22ec4d Signed-off-by: Tim Crawford <tcrawford(a)system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78141 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- M util/docker/Makefile 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Felix Singer: Looks good to me, approved Martin L Roth: Looks good to me, approved build bot (Jenkins): Verified diff --git a/util/docker/Makefile b/util/docker/Makefile index ca274b7..77526bb 100644 --- a/util/docker/Makefile +++ b/util/docker/Makefile @@ -44,7 +44,7 @@ @echo "Building coreboot SDK $(crossgcc_version) from commit $(DOCKER_COMMIT)" $(DOCKER) build \ --tag coreboot/coreboot-sdk:$(COREBOOT_IMAGE_TAG) \ - --build-arg=SDK_VERSION="$(SDK_VERSION)" \ + --build-arg=SDK_VERSION="$(COREBOOT_IMAGE_TAG)" \ --build-arg=DOCKER_COMMIT="$(DOCKER_COMMIT)" \ --build-arg=CROSSGCC_PARAM="$(COREBOOT_CROSSGCC_PARAM)" \ coreboot-sdk -- To view, visit https://review.coreboot.org/c/coreboot/+/78141?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4c8be7d0f7c1ac82da397e720d13a7075f22ec4d Gerrit-Change-Number: 78141 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: soc/intel/meteorlake: Update TBT PCIe Reg Map offsets for QS
by Jamie Ryu (Code Review) 04 Oct '23

04 Oct '23

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Kapil Porwal, Ravishankar Sarawadi, Subrata Banik, Tarun, Utkarsh H Patel. Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78163?usp=email ) Change subject: soc/intel/meteorlake: Update TBT PCIe Reg Map offsets for QS ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/78163?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0497f7108ef5046c2694aece232263582514a0c5 Gerrit-Change-Number: 78163 Gerrit-PatchSet: 4 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 03 Oct 2023 22:29:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: util/docker: Fix setting SDK_VERSION
by Felix Singer (Code Review) 04 Oct '23

04 Oct '23

Attention is currently required from: Tim Crawford. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78141?usp=email ) Change subject: util/docker: Fix setting SDK_VERSION ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78141?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4c8be7d0f7c1ac82da397e720d13a7075f22ec4d Gerrit-Change-Number: 78141 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Comment-Date: Tue, 03 Oct 2023 22:26:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: util/docker: Fix setting SDK_VERSION
by Martin L Roth (Code Review) 04 Oct '23

04 Oct '23

Attention is currently required from: Tim Crawford. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78141?usp=email ) Change subject: util/docker: Fix setting SDK_VERSION ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78141?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4c8be7d0f7c1ac82da397e720d13a7075f22ec4d Gerrit-Change-Number: 78141 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Comment-Date: Tue, 03 Oct 2023 22:20:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: sb/intel/bd82x6x/early_pch: Follow PCH BIOS spec
by Kyösti Mälkki (Code Review) 04 Oct '23

04 Oct '23

Attention is currently required from: Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78225?usp=email ) Change subject: sb/intel/bd82x6x/early_pch: Follow PCH BIOS spec ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78225?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I865818c0c22194fffcb2bbdf8c43737b0dce2307 Gerrit-Change-Number: 78225 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 03 Oct 2023 22:06:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: cpu/intel/model_206ax: Only use supported C-states
by Kyösti Mälkki (Code Review) 04 Oct '23

04 Oct '23

Attention is currently required from: Patrick Rudolph, Paul Menzel. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78194?usp=email ) Change subject: cpu/intel/model_206ax: Only use supported C-states ...................................................................... Patch Set 3: (1 comment) File src/cpu/intel/model_206ax/acpi.c: https://review.coreboot.org/c/coreboot/+/78194/comment/6f1bcc83_41952d53 : PS3, Line 160: count, c_state_names[acpi_cstates[i]]); Should the logge ACPI C%d here use the .ctype field value? It's possible count != i + 1, in case there were duplicates or invalid entries. -- To view, visit https://review.coreboot.org/c/coreboot/+/78194?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaaee050e0ce3c29c12e97f5819a29f485a7946c2 Gerrit-Change-Number: 78194 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 03 Oct 2023 22:02:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: arch/x86/cpu_common: Add cpu_get_c_state_support
by Kyösti Mälkki (Code Review) 03 Oct '23

03 Oct '23

Attention is currently required from: Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78224?usp=email ) Change subject: arch/x86/cpu_common: Add cpu_get_c_state_support ...................................................................... Patch Set 1: (2 comments) File src/arch/x86/cpu_common.c: https://review.coreboot.org/c/coreboot/+/78224/comment/2ba12dac_8f258399 : PS1, Line 201: (state > 4)) I don't mind it like this, but would fit previous line. File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/c/coreboot/+/78224/comment/921f2279_9a601075 : PS1, Line 324: uint8_t cpu_get_c_substate_support(const int lvl); Rename lvl to state to match .c. -- To view, visit https://review.coreboot.org/c/coreboot/+/78224?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie57e87609ea5d6ec6f37154e8b84f1e9574aa4a9 Gerrit-Change-Number: 78224 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 03 Oct 2023 21:59:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit October 2023