coreboot-gerrit October 2022

coreboot-gerrit@coreboot.org

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5881 discussions

[S] Change in coreboot[master]: nb/intel/i945/raminit.c: Fix formatted print
by Angel Pons (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Arthur Heymans, Elyes Haouas. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68104 ) Change subject: nb/intel/i945/raminit.c: Fix formatted print ...................................................................... Patch Set 2: (1 comment) File src/northbridge/intel/i945/raminit.c: https://review.coreboot.org/c/coreboot/+/68104/comment/5ab5d88c_72a7d37c PS2, Line 77: %08lx > The length modifier for uintptr_t for the printf(3) family of functions is expanded by the macros PRIuPTR, PRIoPTR, PRIxPTR, and PRIXPTR -- To view, visit https://review.coreboot.org/c/coreboot/+/68104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7122988a1c88175a2e72c11bb95bfa434ce48ff2 Gerrit-Change-Number: 68104 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sun, 09 Oct 2022 11:06:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: payloads/cbui: Add new payload CBUI
by Iman Bingi (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph. Iman Bingi has uploaded a new patch set (#88) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 ) Change subject: payloads/cbui: Add new payload CBUI ...................................................................... payloads/cbui: Add new payload CBUI Depends on libpayload and nuklear. Features: * Graphical menus with scrolling. * Text rendering engine (atm only bitmap font) * Support for keyboard and mouse * Support for USB and PS/2 devices * Ported coreinfo and nvramcui * Allows to modify NVRAM and RTC * Works as ELF payload * Works as Seabios secondary payload * Basic support for multiple languages * Hacky support for BIOS calls (depends on NASM) * Runs in qemu and on real hardware * Use linker script to allocate low memory Shortcomings: * Doesn't work in VGA text mode * Untested on UEFI * int32 relocates itself to low memory Licenses: * GPLv2 (CBUI + libpayload) * BSD (libpayload) * MIT (nuklear) TODO: * Test on as much platforms as possible * Link int32 into low memory This is Patrick Rudolph's original patch, updated by Ben Adu-Boahen to: * Add Read/Write module * This module allows read/write to any hardware component that is readable/writeable Note: This is work in progress Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com> --- M payloads/Kconfig M payloads/Makefile.inc A payloads/cbui/.gitignore A payloads/cbui/Kconfig A payloads/cbui/Makefile A payloads/cbui/NuklearUI/NuklearCombo.c A payloads/cbui/NuklearUI/NuklearCombo.h A payloads/cbui/NuklearUI/NuklearCommon.h A payloads/cbui/NuklearUI/NuklearDataGrid.c A payloads/cbui/NuklearUI/NuklearDataGrid.h A payloads/cbui/NuklearUI/NuklearDatePicker.c A payloads/cbui/NuklearUI/NuklearDatePicker.h A payloads/cbui/NuklearUI/NuklearFieldFile.c A payloads/cbui/NuklearUI/NuklearFieldFile.h A payloads/cbui/NuklearUI/NuklearFieldHex.c A payloads/cbui/NuklearUI/NuklearFieldHex.h A payloads/cbui/NuklearUI/NuklearFileChooser.c A payloads/cbui/NuklearUI/NuklearFileChooser.h A payloads/cbui/NuklearUI/NuklearGroup.c A payloads/cbui/NuklearUI/NuklearGroup.h A payloads/cbui/NuklearUI/NuklearHex.c A payloads/cbui/NuklearUI/NuklearHex.h A payloads/cbui/NuklearUI/NuklearIntegerRange.c A payloads/cbui/NuklearUI/NuklearIntegerRange.h A payloads/cbui/NuklearUI/NuklearLabel.c A payloads/cbui/NuklearUI/NuklearLabel.h A payloads/cbui/NuklearUI/NuklearObject.c A payloads/cbui/NuklearUI/NuklearObject.h A payloads/cbui/NuklearUI/NuklearPciHeader.c A payloads/cbui/NuklearUI/NuklearPciHeader.h A payloads/cbui/NuklearUI/NuklearRW.c A payloads/cbui/NuklearUI/NuklearRW.h A payloads/cbui/NuklearUI/NuklearRoot.c A payloads/cbui/NuklearUI/NuklearRwAcpi.c A payloads/cbui/NuklearUI/NuklearRwAcpi.h A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.c A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.h A payloads/cbui/NuklearUI/NuklearRwClock.c A payloads/cbui/NuklearUI/NuklearRwClock.h A payloads/cbui/NuklearUI/NuklearRwCpuMsr.c A payloads/cbui/NuklearUI/NuklearRwCpuMsr.h A payloads/cbui/NuklearUI/NuklearRwDimmSpd.c A payloads/cbui/NuklearUI/NuklearRwDimmSpd.h A payloads/cbui/NuklearUI/NuklearRwE820.c A payloads/cbui/NuklearUI/NuklearRwE820.h A payloads/cbui/NuklearUI/NuklearRwEc.c A payloads/cbui/NuklearUI/NuklearRwEc.h A payloads/cbui/NuklearUI/NuklearRwIo.c A payloads/cbui/NuklearUI/NuklearRwIo.h A payloads/cbui/NuklearUI/NuklearRwIoIndexData.c A payloads/cbui/NuklearUI/NuklearRwIoIndexData.h A payloads/cbui/NuklearUI/NuklearRwMemory.c A payloads/cbui/NuklearUI/NuklearRwMemory.h A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.c A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.h A payloads/cbui/NuklearUI/NuklearRwNvram.c A payloads/cbui/NuklearUI/NuklearRwNvram.h A payloads/cbui/NuklearUI/NuklearRwPci.c A payloads/cbui/NuklearUI/NuklearRwPci.h A payloads/cbui/NuklearUI/NuklearRwPciIndexData.c A payloads/cbui/NuklearUI/NuklearRwPciIndexData.h A payloads/cbui/NuklearUI/NuklearRwPciOptionRom.c A payloads/cbui/NuklearUI/NuklearRwPciOptionRom.h A payloads/cbui/NuklearUI/NuklearRwSmbios.c A payloads/cbui/NuklearUI/NuklearRwSmbios.h A payloads/cbui/NuklearUI/NuklearRwSmbus.c A payloads/cbui/NuklearUI/NuklearRwSmbus.h A payloads/cbui/NuklearUI/NuklearRwSmram.c A payloads/cbui/NuklearUI/NuklearRwSmram.h A payloads/cbui/NuklearUI/NuklearRwSuperIo.c A payloads/cbui/NuklearUI/NuklearRwSuperIo.h A payloads/cbui/NuklearUI/NuklearRwUsb.c A payloads/cbui/NuklearUI/NuklearRwUsb.h A payloads/cbui/NuklearUI/NuklearStyle.c A payloads/cbui/NuklearUI/NuklearStyle.h A payloads/cbui/NuklearUI/NuklearTabView.c A payloads/cbui/NuklearUI/NuklearTextView.c A payloads/cbui/NuklearUI/NuklearTextView.h A payloads/cbui/NuklearUI/NuklearTextfield.c A payloads/cbui/NuklearUI/NuklearTextfield.h A payloads/cbui/NuklearUI/NuklearTimePicker.c A payloads/cbui/NuklearUI/NuklearTimePicker.h A payloads/cbui/NuklearUI/NuklearUI.h A payloads/cbui/NuklearUI/NuklearVector.c A payloads/cbui/NuklearUI/NuklearVector.h A payloads/cbui/arch/x86/cpuid.c A payloads/cbui/arch/x86/cpuid.h A payloads/cbui/arch/x86/int32.h A payloads/cbui/arch/x86/int32.ld A payloads/cbui/arch/x86/int32.nasm A payloads/cbui/arch/x86/memcpy.c A payloads/cbui/arch/x86/memcpy.h A payloads/cbui/arch/x86/vga.c A payloads/cbui/arch/x86/vga.h A payloads/cbui/cbui.c A payloads/cbui/cbui.h A payloads/cbui/fsys/usbstorage.c A payloads/cbui/fsys/usbstorage.h A payloads/cbui/gfx/coreboot.c A payloads/cbui/gfx/coreboot.h A payloads/cbui/gfx/gfx.c A payloads/cbui/gfx/gfx.h A payloads/cbui/gfx/splash.c A payloads/cbui/gfx/splash.h A payloads/cbui/gfx/vbe.c A payloads/cbui/gfx/vbe.h A payloads/cbui/lang/de.c A payloads/cbui/lang/en.c A payloads/cbui/lang/lang.c A payloads/cbui/lang/lang.h A payloads/cbui/logo/cbui.png A payloads/cbui/lp.config A payloads/cbui/modules/bootlog_module.c A payloads/cbui/modules/cbfs_module.c A payloads/cbui/modules/cmos_module.c A payloads/cbui/modules/coreboot_module.c A payloads/cbui/modules/cpuinfo_module.c A payloads/cbui/modules/license_module.c A payloads/cbui/modules/modules.c A payloads/cbui/modules/modules.h A payloads/cbui/modules/nvram_module.c A payloads/cbui/modules/pci_module.c A payloads/cbui/modules/reboot_module.c A payloads/cbui/modules/rtc_module.c A payloads/cbui/modules/rw_module.c A payloads/cbui/modules/timestamps_module.c A payloads/cbui/modules/usb_module.c A payloads/libpayload/configs/defconfig-cbui 128 files changed, 15,390 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/88 -- To view, visit https://review.coreboot.org/c/coreboot/+/23586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Gerrit-Change-Number: 23586 Gerrit-PatchSet: 88 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/google/rex: Add initial fw config
by Kapil Porwal (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Tarun Tuli, Subrata Banik. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68220 ) Change subject: mb/google/rex: Add initial fw config ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68220/comment/8b8ed8f0_6211b514 PS3, Line 13: affter > after Ack File src/mainboard/google/rex/variants/rex0/overridetree.cb: https://review.coreboot.org/c/coreboot/+/68220/comment/0aaadc12_d7d370fb PS3, Line 25: USB3 > USB3_PS8815 Ack https://review.coreboot.org/c/coreboot/+/68220/comment/0c27d971_156d5a30 PS3, Line 156: probe DB_USB USB3 : probe DB_USB USB4 > i don't think it's needed It will remove unnecessary ACPI code when USB DB is not present on a SKU. Is there any down side of it? -- To view, visit https://review.coreboot.org/c/coreboot/+/68220 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66f8b3e4ab414c03b8d63fdd31e0f3f424619340 Gerrit-Change-Number: 68220 Gerrit-PatchSet: 3 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Sun, 09 Oct 2022 08:38:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/rex: Add initial fw config
by Kapil Porwal (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Tarun Tuli, Kapil Porwal. Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68220 to look at the new patch set (#4). Change subject: mb/google/rex: Add initial fw config ...................................................................... mb/google/rex: Add initial fw config Add initial fw config as per config.star. BUG=none TEST=emerge-rex coreboot. Make sure that ACPI tables are equivalent before and after this change with CBI.FW_CONFIG set to 0x1561. Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: I66f8b3e4ab414c03b8d63fdd31e0f3f424619340 --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 94 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/68220/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/68220 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66f8b3e4ab414c03b8d63fdd31e0f3f424619340 Gerrit-Change-Number: 68220 Gerrit-PatchSet: 4 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newpatchset

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[XL] Change in coreboot[master]: payloads/cbui: Add new payload CBUI
by Iman Bingi (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph. Iman Bingi has uploaded a new patch set (#87) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 ) Change subject: payloads/cbui: Add new payload CBUI ...................................................................... payloads/cbui: Add new payload CBUI Depends on libpayload and nuklear. Features: * Graphical menus with scrolling. * Text rendering engine (atm only bitmap font) * Support for keyboard and mouse * Support for USB and PS/2 devices * Ported coreinfo and nvramcui * Allows to modify NVRAM and RTC * Works as ELF payload * Works as Seabios secondary payload * Basic support for multiple languages * Hacky support for BIOS calls (depends on NASM) * Runs in qemu and on real hardware * Use linker script to allocate low memory Shortcomings: * Doesn't work in VGA text mode * Untested on UEFI * int32 relocates itself to low memory Licenses: * GPLv2 (CBUI + libpayload) * BSD (libpayload) * MIT (nuklear) TODO: * Test on as much platforms as possible * Link int32 into low memory This is Patrick Rudolph's original patch, updated by Ben Adu-Boahen to: * Add Read/Write module * This module allows read/write to any hardware component that is readable/writeable Note: This is work in progress Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com> --- M payloads/Kconfig M payloads/Makefile.inc A payloads/cbui/.gitignore A payloads/cbui/Kconfig A payloads/cbui/Makefile A payloads/cbui/NuklearUI/NuklearCombo.c A payloads/cbui/NuklearUI/NuklearCombo.h A payloads/cbui/NuklearUI/NuklearCommon.h A payloads/cbui/NuklearUI/NuklearDataGrid.c A payloads/cbui/NuklearUI/NuklearDataGrid.h A payloads/cbui/NuklearUI/NuklearDatePicker.c A payloads/cbui/NuklearUI/NuklearDatePicker.h A payloads/cbui/NuklearUI/NuklearFieldFile.c A payloads/cbui/NuklearUI/NuklearFieldFile.h A payloads/cbui/NuklearUI/NuklearFieldHex.c A payloads/cbui/NuklearUI/NuklearFieldHex.h A payloads/cbui/NuklearUI/NuklearFileChooser.c A payloads/cbui/NuklearUI/NuklearFileChooser.h A payloads/cbui/NuklearUI/NuklearGroup.c A payloads/cbui/NuklearUI/NuklearGroup.h A payloads/cbui/NuklearUI/NuklearHex.c A payloads/cbui/NuklearUI/NuklearHex.h A payloads/cbui/NuklearUI/NuklearIntegerRange.c A payloads/cbui/NuklearUI/NuklearIntegerRange.h A payloads/cbui/NuklearUI/NuklearLabel.c A payloads/cbui/NuklearUI/NuklearLabel.h A payloads/cbui/NuklearUI/NuklearObject.c A payloads/cbui/NuklearUI/NuklearObject.h A payloads/cbui/NuklearUI/NuklearPciHeader.c A payloads/cbui/NuklearUI/NuklearPciHeader.h A payloads/cbui/NuklearUI/NuklearRW.c A payloads/cbui/NuklearUI/NuklearRW.h A payloads/cbui/NuklearUI/NuklearRoot.c A payloads/cbui/NuklearUI/NuklearRwAcpi.c A payloads/cbui/NuklearUI/NuklearRwAcpi.h A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.c A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.h A payloads/cbui/NuklearUI/NuklearRwClock.c A payloads/cbui/NuklearUI/NuklearRwClock.h A payloads/cbui/NuklearUI/NuklearRwCpuMsr.c A payloads/cbui/NuklearUI/NuklearRwCpuMsr.h A payloads/cbui/NuklearUI/NuklearRwDimmSpd.c A payloads/cbui/NuklearUI/NuklearRwDimmSpd.h A payloads/cbui/NuklearUI/NuklearRwE820.c A payloads/cbui/NuklearUI/NuklearRwE820.h A payloads/cbui/NuklearUI/NuklearRwEc.c A payloads/cbui/NuklearUI/NuklearRwEc.h A payloads/cbui/NuklearUI/NuklearRwIo.c A payloads/cbui/NuklearUI/NuklearRwIo.h A payloads/cbui/NuklearUI/NuklearRwIoIndexData.c A payloads/cbui/NuklearUI/NuklearRwIoIndexData.h A payloads/cbui/NuklearUI/NuklearRwMemory.c A payloads/cbui/NuklearUI/NuklearRwMemory.h A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.c A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.h A payloads/cbui/NuklearUI/NuklearRwNvram.c A payloads/cbui/NuklearUI/NuklearRwNvram.h A payloads/cbui/NuklearUI/NuklearRwPci.c A payloads/cbui/NuklearUI/NuklearRwPci.h A payloads/cbui/NuklearUI/NuklearRwPciIndexData.c A payloads/cbui/NuklearUI/NuklearRwPciIndexData.h A payloads/cbui/NuklearUI/NuklearRwPciOptionRom.c A payloads/cbui/NuklearUI/NuklearRwPciOptionRom.h A payloads/cbui/NuklearUI/NuklearRwSmbios.c A payloads/cbui/NuklearUI/NuklearRwSmbios.h A payloads/cbui/NuklearUI/NuklearRwSmbus.c A payloads/cbui/NuklearUI/NuklearRwSmbus.h A payloads/cbui/NuklearUI/NuklearRwSmram.c A payloads/cbui/NuklearUI/NuklearRwSmram.h A payloads/cbui/NuklearUI/NuklearRwSuperIo.c A payloads/cbui/NuklearUI/NuklearRwSuperIo.h A payloads/cbui/NuklearUI/NuklearRwUsb.c A payloads/cbui/NuklearUI/NuklearRwUsb.h A payloads/cbui/NuklearUI/NuklearStyle.c A payloads/cbui/NuklearUI/NuklearStyle.h A payloads/cbui/NuklearUI/NuklearTabView.c A payloads/cbui/NuklearUI/NuklearTextView.c A payloads/cbui/NuklearUI/NuklearTextView.h A payloads/cbui/NuklearUI/NuklearTextfield.c A payloads/cbui/NuklearUI/NuklearTextfield.h A payloads/cbui/NuklearUI/NuklearTimePicker.c A payloads/cbui/NuklearUI/NuklearTimePicker.h A payloads/cbui/NuklearUI/NuklearUI.h A payloads/cbui/NuklearUI/NuklearVector.c A payloads/cbui/NuklearUI/NuklearVector.h A payloads/cbui/arch/x86/cpuid.c A payloads/cbui/arch/x86/cpuid.h A payloads/cbui/arch/x86/int32.h A payloads/cbui/arch/x86/int32.ld A payloads/cbui/arch/x86/int32.nasm A payloads/cbui/arch/x86/memcpy.c A payloads/cbui/arch/x86/memcpy.h A payloads/cbui/arch/x86/vga.c A payloads/cbui/arch/x86/vga.h A payloads/cbui/cbui.c A payloads/cbui/cbui.h A payloads/cbui/fsys/usbstorage.c A payloads/cbui/fsys/usbstorage.h A payloads/cbui/gfx/coreboot.c A payloads/cbui/gfx/coreboot.h A payloads/cbui/gfx/gfx.c A payloads/cbui/gfx/gfx.h A payloads/cbui/gfx/splash.c A payloads/cbui/gfx/splash.h A payloads/cbui/gfx/vbe.c A payloads/cbui/gfx/vbe.h A payloads/cbui/lang/de.c A payloads/cbui/lang/en.c A payloads/cbui/lang/lang.c A payloads/cbui/lang/lang.h A payloads/cbui/logo/cbui.png A payloads/cbui/lp.config A payloads/cbui/modules/bootlog_module.c A payloads/cbui/modules/cbfs_module.c A payloads/cbui/modules/cmos_module.c A payloads/cbui/modules/coreboot_module.c A payloads/cbui/modules/cpuinfo_module.c A payloads/cbui/modules/license_module.c A payloads/cbui/modules/modules.c A payloads/cbui/modules/modules.h A payloads/cbui/modules/nvram_module.c A payloads/cbui/modules/pci_module.c A payloads/cbui/modules/reboot_module.c A payloads/cbui/modules/rtc_module.c A payloads/cbui/modules/rw_module.c A payloads/cbui/modules/timestamps_module.c A payloads/cbui/modules/usb_module.c A payloads/libpayload/configs/defconfig-cbui 128 files changed, 15,381 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/87 -- To view, visit https://review.coreboot.org/c/coreboot/+/23586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Gerrit-Change-Number: 23586 Gerrit-PatchSet: 87 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: util/lint: Fix typo in lint-stable-003-whitespace
by Elyes Haouas (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Martin L Roth, Martin Roth. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68243 ) Change subject: util/lint: Fix typo in lint-stable-003-whitespace ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Please see https://review.coreboot.org/c/coreboot/+/68225 Thx -- To view, visit https://review.coreboot.org/c/coreboot/+/68243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0101da5943a35e688d50ec5750e96e48956aa820 Gerrit-Change-Number: 68243 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Sun, 09 Oct 2022 07:51:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/i945/raminit.c: Fix formatted print
by build bot (Jenkins) (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Arthur Heymans. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68104 ) Change subject: nb/intel/i945/raminit.c: Fix formatted print ...................................................................... Patch Set 2: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/68104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7122988a1c88175a2e72c11bb95bfa434ce48ff2 Gerrit-Change-Number: 68104 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sun, 09 Oct 2022 07:45:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [only for test] Use -Wformat also for some 'debugging code'
by Elyes Haouas (Code Review) 09 Oct '22

09 Oct '22

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68246 ) Change subject: [only for test] Use -Wformat also for some 'debugging code' ...................................................................... [only for test] Use -Wformat also for some 'debugging code' Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I76f861a573feaa72ff988ffc9d10b7536fa5eec5 --- M Makefile.inc M src/Kconfig M src/cpu/x86/Kconfig.debug_cpu 3 files changed, 46 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/68246/1 diff --git a/Makefile.inc b/Makefile.inc index 0ed205f..fc29eb1 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -434,7 +434,7 @@ CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -Wimplicit-fallthrough CFLAGS_common += -Wshadow -Wdate-time -Wtype-limits -Wvla -CFLAGS_common += -Wdangling-else +CFLAGS_common += -Wdangling-else -Wformat CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer CFLAGS_common += -fstrict-aliasing -ffunction-sections -fdata-sections -fno-pie ifeq ($(CONFIG_COMPILER_GCC),y) diff --git a/src/Kconfig b/src/Kconfig index 0d3879e..76830e5 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -894,7 +894,7 @@ # TODO: Better help text and detailed instructions. config GDB_STUB bool "GDB debugging support" - default n + default y depends on DRIVERS_UART help If enabled, you will be able to set breakpoints for gdb debugging. @@ -902,7 +902,7 @@ config GDB_WAIT bool "Wait for a GDB connection in the ramstage" - default n + default y depends on GDB_STUB help If enabled, coreboot will wait for a GDB connection in the ramstage. @@ -910,7 +910,7 @@ config FATAL_ASSERTS bool "Halt when hitting a BUG() or assertion error" - default n + default y help If enabled, coreboot will call hlt() on a BUG() or failed ASSERT(). @@ -923,16 +923,16 @@ config DEBUG_CBFS bool "Output verbose CBFS debug messages" - default n + default y help This option enables additional CBFS related debug messages. config HAVE_DEBUG_RAM_SETUP - def_bool n + def_bool y config DEBUG_RAM_SETUP bool "Output verbose RAM init debug messages" - default n + default y depends on HAVE_DEBUG_RAM_SETUP help This option enables additional RAM init related debug messages. @@ -945,17 +945,17 @@ config DEBUG_PIRQ bool "Check PIRQ table consistency" - default n + default y depends on GENERATE_PIRQ_TABLE help If unsure, say N. config HAVE_DEBUG_SMBUS - def_bool n + def_bool y config DEBUG_SMBUS bool "Output verbose SMBus debug messages" - default n + default y depends on HAVE_DEBUG_SMBUS help This option enables additional SMBus (and SPD) debug messages. @@ -966,7 +966,7 @@ config DEBUG_SMI bool "Output verbose SMI debug messages" - default n + default y depends on HAVE_SMI_HANDLER select SPI_FLASH_SMM if EM100PRO_SPI_CONSOLE || CONSOLE_SPI_FLASH help @@ -978,6 +978,7 @@ config DEBUG_PERIODIC_SMI bool "Trigger SMI periodically" + default y depends on DEBUG_SMI # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional @@ -985,7 +986,7 @@ config DEBUG_MALLOC prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8 || CONSOLE_OVERRIDE_LOGLEVEL bool - default n + default y help This option enables additional malloc related debug messages. @@ -996,7 +997,7 @@ # Only visible if DEBUG_SPEW (8) is set. config DEBUG_RESOURCES bool "Output verbose PCI MEM and IO resource debug messages" if DEFAULT_CONSOLE_LOGLEVEL_8 || CONSOLE_OVERRIDE_LOGLEVEL - default n + default y help This option enables additional PCI memory and IO debug messages. Note: This option will increase the size of the coreboot image. @@ -1004,7 +1005,7 @@ config DEBUG_CONSOLE_INIT bool "Debug console initialisation code" - default n + default y help With this option printk()'s are attempted before console hardware initialisation has been completed. Your mileage may vary. @@ -1019,7 +1020,7 @@ config REALMODE_DEBUG prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8 || CONSOLE_OVERRIDE_LOGLEVEL bool - default n + default y depends on PCI_OPTION_ROM_RUN_REALMODE help This option enables additional x86emu related debug messages. @@ -1030,7 +1031,7 @@ config X86EMU_DEBUG bool "Output verbose x86emu debug messages" - default n + default y depends on PCI_OPTION_ROM_RUN_YABEL help This option enables additional x86emu related debug messages. @@ -1041,7 +1042,7 @@ config X86EMU_DEBUG_JMP bool "Trace JMP/RETF" - default n + default y depends on X86EMU_DEBUG help Print information about JMP and RETF opcodes from x86emu. @@ -1052,7 +1053,7 @@ config X86EMU_DEBUG_TRACE bool "Trace all opcodes" - default n + default y depends on X86EMU_DEBUG help Print _all_ opcodes that are executed by x86emu. @@ -1065,7 +1066,7 @@ config X86EMU_DEBUG_PNP bool "Log Plug&Play accesses" - default n + default y depends on X86EMU_DEBUG help Print Plug And Play accesses made by option ROMs. @@ -1076,7 +1077,7 @@ config X86EMU_DEBUG_DISK bool "Log Disk I/O" - default n + default y depends on X86EMU_DEBUG help Print Disk I/O related messages. @@ -1087,7 +1088,7 @@ config X86EMU_DEBUG_PMM bool "Log PMM" - default n + default y depends on X86EMU_DEBUG help Print messages related to POST Memory Manager (PMM). @@ -1099,7 +1100,7 @@ config X86EMU_DEBUG_VBE bool "Debug VESA BIOS Extensions" - default n + default y depends on X86EMU_DEBUG help Print messages related to VESA BIOS Extension (VBE) functions. @@ -1110,7 +1111,7 @@ config X86EMU_DEBUG_INT10 bool "Redirect INT10 output to console" - default n + default y depends on X86EMU_DEBUG help Let INT10 (i.e. character output) calls print messages to debug output. @@ -1121,7 +1122,7 @@ config X86EMU_DEBUG_INTERRUPTS bool "Log intXX calls" - default n + default y depends on X86EMU_DEBUG help Print messages related to interrupt handling. @@ -1132,7 +1133,7 @@ config X86EMU_DEBUG_CHECK_VMEM_ACCESS bool "Log special memory accesses" - default n + default y depends on X86EMU_DEBUG help Print messages related to accesses to certain areas of the virtual @@ -1144,7 +1145,7 @@ config X86EMU_DEBUG_MEM bool "Log all memory accesses" - default n + default y depends on X86EMU_DEBUG help Print memory accesses made by option ROM. @@ -1156,7 +1157,7 @@ config X86EMU_DEBUG_IO bool "Log IO accesses" - default n + default y depends on X86EMU_DEBUG help Print I/O accesses made by option ROM. @@ -1167,7 +1168,7 @@ config X86EMU_DEBUG_TIMINGS bool "Output timing information" - default n + default y depends on X86EMU_DEBUG && HAVE_MONOTONIC_TIMER help Print timing information needed by i915tool. @@ -1176,14 +1177,14 @@ config DEBUG_SPI_FLASH bool "Output verbose SPI flash debug messages" - default n + default y depends on SPI_FLASH help This option enables additional SPI flash related debug messages. config DEBUG_IPMI bool "Output verbose IPMI debug messages" - default n + default y depends on IPMI_KCS help This option enables additional IPMI related debug messages. @@ -1200,7 +1201,7 @@ config DEBUG_FUNC bool "Enable function entry and exit reporting macros" if DEFAULT_CONSOLE_LOGLEVEL_8 || CONSOLE_OVERRIDE_LOGLEVEL - default n + default y help This option enables additional function entry and exit debug messages for select functions. @@ -1209,7 +1210,7 @@ config DEBUG_COVERAGE bool "Debug code coverage" - default n + default y depends on COVERAGE help If enabled, the code coverage hooks in coreboot will output some @@ -1217,14 +1218,14 @@ config DEBUG_BOOT_STATE bool "Debug boot state machine" - default n + default y help Control debugging of the boot state machine. When selected displays the state boundaries in ramstage. config DEBUG_ADA_CODE bool "Compile debug code in Ada sources" - default n + default y help Add the compiler switch `-gnata` to compile code guarded by `pragma Debug`. diff --git a/src/cpu/x86/Kconfig.debug_cpu b/src/cpu/x86/Kconfig.debug_cpu index 7edb60f..7beccb1 100644 --- a/src/cpu/x86/Kconfig.debug_cpu +++ b/src/cpu/x86/Kconfig.debug_cpu @@ -9,6 +9,7 @@ config DISPLAY_MTRRS bool "Display intermediate MTRR settings" + default y config DEBUG_SMM_RELOCATION bool "Debug SMM relocation code" -- To view, visit https://review.coreboot.org/c/coreboot/+/68246 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I76f861a573feaa72ff988ffc9d10b7536fa5eec5 Gerrit-Change-Number: 68246 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: Docs/architecture: Fix filename for coreboot architecture diagram
by Felix Singer (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Nicholas Chin. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67782 ) Change subject: Docs/architecture: Fix filename for coreboot architecture diagram ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67782 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I512646e9af312ba2e1db8f597f6fffa8d54a3515 Gerrit-Change-Number: 67782 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Sun, 09 Oct 2022 06:31:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/common: Remove buildtime error for unknown cpu
by Marshall Dawson (Code Review) 09 Oct '22

09 Oct '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin L Roth, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68245 ) Change subject: soc/amd/common: Remove buildtime error for unknown cpu ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68245 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib02bbe1f9ffb343e1ff7c2bfdc45e7edffe7aaed Gerrit-Change-Number: 68245 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 09 Oct 2022 01:59:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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