coreboot-gerrit October 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: soc/intel/alderlake_n: Enable FIVR VCCST ICCMax Control
by V Sowmya (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Baieswara Reddy Sagili. V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68252 ) Change subject: soc/intel/alderlake_n: Enable FIVR VCCST ICCMax Control ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68252/comment/683a0962_65e846c7 PS2, Line 7: alderlake-N > nit: maybe alderlake_n? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/68252 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10709ee8653563b397e8408e8e24ef8e656b02e5 Gerrit-Change-Number: 68252 Gerrit-PatchSet: 3 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Baieswara Reddy Sagili <baieswara.reddy.sagili(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Baieswara Reddy Sagili <baieswara.reddy.sagili(a)intel.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 02:53:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake_n: Enable FIVR VCCST ICCMax Control
by V Sowmya (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: V Sowmya, Kangheui Won, Tim Wawrzynczak, Baieswara Reddy Sagili. Hello build bot (Jenkins), Kangheui Won, Reka Norman, Tim Wawrzynczak, Baieswara Reddy Sagili, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68252 to look at the new patch set (#3). Change subject: soc/intel/alderlake_n: Enable FIVR VCCST ICCMax Control ...................................................................... soc/intel/alderlake_n: Enable FIVR VCCST ICCMax Control Enable the VCCST ICCMax Control for the ADL-N display flicker issue. Please refer the Doc with ID 742988 for more details. BUG=b:248249033 TEST=Verified that the display flicker issue is fixed. Signed-off-by: V Sowmya <v.sowmya(a)intel.com> Change-Id: I10709ee8653563b397e8408e8e24ef8e656b02e5 --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/68252/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68252 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10709ee8653563b397e8408e8e24ef8e656b02e5 Gerrit-Change-Number: 68252 Gerrit-PatchSet: 3 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Baieswara Reddy Sagili <baieswara.reddy.sagili(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Baieswara Reddy Sagili <baieswara.reddy.sagili(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/skyrim/var/baseboard: Update gpio setting for touchscreen IRQ
by Frank Wu (Code Review) 21 Oct '22

21 Oct '22

Frank Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68638 ) Change subject: mb/google/skyrim/var/baseboard: Update gpio setting for touchscreen IRQ ...................................................................... mb/google/skyrim/var/baseboard: Update gpio setting for touchscreen IRQ The touchscreen IRQ has been configured as LEVEL_LOW in skyrim projects. Therefore, update the gpio.c to be consistent with the configuration. BUG=b:253506651, b:251367588 BRANCH=None TEST=FW_NAME=frostflow emerge-skyrim coreboot Signed-off-by: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Change-Id: Iccfe5b01f10899c43151762e4730a05990afa602 --- M src/mainboard/google/skyrim/variants/baseboard/gpio.c 1 file changed, 18 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/68638/1 diff --git a/src/mainboard/google/skyrim/variants/baseboard/gpio.c b/src/mainboard/google/skyrim/variants/baseboard/gpio.c index b44114e..6062d93 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/gpio.c +++ b/src/mainboard/google/skyrim/variants/baseboard/gpio.c @@ -51,7 +51,7 @@ /* AC_PRES */ PAD_NF(GPIO_23, AC_PRES, PULL_UP), /* SOC_FP_INT_L */ - PAD_SCI(GPIO_24, PULL_NONE, EDGE_LOW), + PAD_SCI(GPIO_24, PULL_NONE, LEVEL_LOW), /* GPIO_25: Not available */ /* PCIE_RST0_L */ PAD_NFO(GPIO_26, PCIE_RST0_L, HIGH), -- To view, visit https://review.coreboot.org/c/coreboot/+/68638 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccfe5b01f10899c43151762e4730a05990afa602 Gerrit-Change-Number: 68638 Gerrit-PatchSet: 1 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: commonlib/fsp_relocate: Fix Coverity Issues
by build bot (Jenkins) (Code Review) 21 Oct '22

21 Oct '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68637 ) Change subject: commonlib/fsp_relocate: Fix Coverity Issues ...................................................................... Patch Set 1: (1 comment) File src/commonlib/fsp_relocate.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160950): https://review.coreboot.org/c/coreboot/+/68637/comment/c7981df6_883a6ef4 PS1, Line 653: if (fih_offset) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/68637 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I635c62929e8be9a474a91a62c29c3b5ee9b0ee64 Gerrit-Change-Number: 68637 Gerrit-PatchSet: 1 Gerrit-Owner: Ed Sharma <aeddiesharma(a)fb.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 21 Oct 2022 01:55:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: commonlib/fsp_relocate: Fix Coverity Issues
by Ed Sharma (Code Review) 21 Oct '22

21 Oct '22

Ed Sharma has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68637 ) Change subject: commonlib/fsp_relocate: Fix Coverity Issues ...................................................................... commonlib/fsp_relocate: Fix Coverity Issues Recently committed change 1df1cf9 resulted in some Coverity reported issues. This change attempts to fix the static analysis issues reported. TESTED= This code is tested with FSP version 33A for DeltaLake boot Signed-off-by: Eddie Sharma <aeddiesharma(a)fb.com> Change-Id: I635c62929e8be9a474a91a62c29c3b5ee9b0ee64 --- M src/commonlib/fsp_relocate.c 1 file changed, 28 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/68637/1 diff --git a/src/commonlib/fsp_relocate.c b/src/commonlib/fsp_relocate.c index 8dabad5..19eecf3 100644 --- a/src/commonlib/fsp_relocate.c +++ b/src/commonlib/fsp_relocate.c @@ -177,11 +177,12 @@ EFI_IMAGE_OPTIONAL_HEADER32 *ophdr; FSP_INFO_HEADER *fih; uint32_t roffset, rsize; - uint32_t offset; + uint32_t offset, offset_limit; uint8_t *pe_base = pe; uint32_t image_base; uint32_t img_base_off; uint32_t delta; + void *ptr = NULL; doshdr = pe; if (read_le16(&doshdr->e_magic) != EFI_IMAGE_DOS_SIGNATURE) { @@ -226,7 +227,8 @@ // TODO - add support for PE32+ also offset = roffset; - while (offset < (roffset + rsize)) { + offset_limit = roffset + rsize; + while (offset < offset_limit) { uint32_t vaddr; uint32_t rlen, rnum; uint16_t *rdata; @@ -253,10 +255,11 @@ case EFI_IMAGE_REL_BASED_ABSOLUTE: continue; case EFI_IMAGE_REL_BASED_HIGHLOW: - val = read_le32(&pe_base[aoff]); + ptr = &pe_base[aoff]; + val = read_le32(ptr); printk(FSP_DBG_LVL, "Adjusting %p %x -> %x\n", - &pe_base[aoff], val, val + delta); - write_le32(&pe_base[aoff], val + delta); + ptr, val, val + delta); + write_le32(ptr, val + delta); break; case EFI_IMAGE_REL_BASED_DIR64: printk(BIOS_ERR, "Error: Unsupported DIR64\n"); @@ -647,7 +650,9 @@ } else if (read_le8(&csh->Type) == EFI_SECTION_PE32) { printk(FSP_DBG_LVL, "PE32 image at offset %zx\n", section_offset); - pe_relocate(new_addr, section_data, fsp, *fih_offset); + if (fih_offset) { + pe_relocate(new_addr, section_data, fsp, *fih_offset); + } } offset += data_size + data_offset; -- To view, visit https://review.coreboot.org/c/coreboot/+/68637 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I635c62929e8be9a474a91a62c29c3b5ee9b0ee64 Gerrit-Change-Number: 68637 Gerrit-PatchSet: 1 Gerrit-Owner: Ed Sharma <aeddiesharma(a)fb.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold:Generate RAM IDs for new memory parts
by EricKY Cheng (Code Review) 21 Oct '22

21 Oct '22

EricKY Cheng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68642 ) Change subject: mb/google/skyrim/var/winterhold:Generate RAM IDs for new memory parts ...................................................................... mb/google/skyrim/var/winterhold:Generate RAM IDs for new memory parts Update H58G56BK7BX068 and H58G66BK7BX067 support BRANCH=None BUG=b:243337816 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I2aa6169c6e824318e738878f8cd19e76fcfd5713 --- M src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc M src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt M src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt 3 files changed, 22 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/68642/1 diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc b/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc index 6948402..1b6fb35 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc @@ -8,7 +8,7 @@ SPD_SOURCES += spd/lp5/set-1/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E SPD_SOURCES += spd/lp5/set-1/spd-3.hex # ID = 2(0b0010) Parts = K3LKBKB0BM-MGCP, H58G56AK6BX069 SPD_SOURCES += spd/lp5/set-1/spd-2.hex # ID = 3(0b0011) Parts = MT62F1G32D4DR-031 WT:B -SPD_SOURCES += spd/lp5/set-1/spd-7.hex # ID = 4(0b0100) Parts = MT62F1G32D2DS-026 WT:B, K3KL8L80CM-MGCT +SPD_SOURCES += spd/lp5/set-1/spd-7.hex # ID = 4(0b0100) Parts = MT62F1G32D2DS-026 WT:B, K3KL8L80CM-MGCT, H58G56BK7BX068 SPD_SOURCES += spd/lp5/set-1/spd-6.hex # ID = 5(0b0101) Parts = K3LKCKC0BM-MGCP, H58G66AK6BX070 SPD_SOURCES += spd/lp5/set-1/spd-4.hex # ID = 6(0b0110) Parts = MT62F2G32D8DR-031 WT:B -SPD_SOURCES += spd/lp5/set-1/spd-8.hex # ID = 7(0b0111) Parts = MT62F2G32D4DS-026 WT:B, K3KL9L90CM-MGCT +SPD_SOURCES += spd/lp5/set-1/spd-8.hex # ID = 7(0b0111) Parts = MT62F2G32D4DS-026 WT:B, K3KL9L90CM-MGCT, H58G66BK7BX067 diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt b/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt index 3c6765e..f3f8850 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt @@ -17,3 +17,5 @@ MT62F2G32D8DR-031 WT:B 6 (0110) MT62F2G32D4DS-026 WT:B 7 (0111) K3KL9L90CM-MGCT 7 (0111) +H58G56BK7BX068 4 (0100) +H58G66BK7BX067 7 (0111) diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt b/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt index 6f027d8..08d09a0 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt @@ -11,3 +11,5 @@ MT62F2G32D8DR-031 WT:B, MT62F2G32D4DS-026 WT:B, K3KL9L90CM-MGCT, +H58G56BK7BX068, +H58G66BK7BX067, \ No newline at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/68642 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2aa6169c6e824318e738878f8cd19e76fcfd5713 Gerrit-Change-Number: 68642 Gerrit-PatchSet: 1 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: intel/i945: Use 'bool' for dual_channel and interleaved
by 9elements QA (Code Review) 21 Oct '22

21 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67925 ) Change subject: intel/i945: Use 'bool' for dual_channel and interleaved ...................................................................... Patch Set 5: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/129421 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/129420 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/129419 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/129418 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/129417 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/129416 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/129415 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/129414 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/129413 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/129412 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/129411 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/129410 FAIL: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/129409 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/129408 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/129407 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/129406 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/67925 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I055847c9b08795683fe2e1dfd7fcde49901fc973 Gerrit-Change-Number: 67925 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 01:49:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: vboot: Add VBOOT_CBFS_INTEGRATION support
by Julius Werner (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Jakub Czapiga. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66909 ) Change subject: vboot: Add VBOOT_CBFS_INTEGRATION support ...................................................................... Patch Set 11: (3 comments) File src/security/vboot/common.c: https://review.coreboot.org/c/coreboot/+/66909/comment/bb713022_89fd983e PS9, Line 72: if (!CONFIG(VBOOT_CBFS_INTEGRATION)) { > > Sorry, I don't follow what happened here... […] Yeah, sorry, I meant `VB2_DIE()`. The underlying callback function is called `vb2ex_abort()`. I got a bit mixed up. I don't really feel this code adds anything here by checking for a condition that shouldn't happen anyway. I generally think it's better (for binary size, etc.) to have those kinds of things caught right away with an assertion in the leaf function, rather than needing lots of code to catch and handle it further up the stack. So I'd prefer to keep this simple and just make sure `vb2api_get_firmware_size()` can't return 0 in the first place (with `VB2_DIE()`). File src/security/vboot/vboot_common.h: https://review.coreboot.org/c/coreboot/+/66909/comment/3c8473bc_f4299e2e PS11, Line 33: void vboot_fail_and_reboot(uint8_t reason, uint8_t subcode); src/soc/amd/common/psp_verstage/psp_verstage.c:reboot_into_recovery() could also use this, I think File src/security/vboot/vboot_logic.c: https://review.coreboot.org/c/coreboot/+/66909/comment/bf57ebde_3aa93cb6 PS11, Line 375: vboot_save_and_reboot(ctx, rv); fail_and_reboot()? -- To view, visit https://review.coreboot.org/c/coreboot/+/66909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I40ae01c477c4e4f7a1c90e4026a8a868ae64b5ca Gerrit-Change-Number: 66909 Gerrit-PatchSet: 11 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 01:46:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jakub Czapiga <jacz(a)semihalf.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/skolas: disable Tccold Handshake
by Selma Bensaid (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Bora Guvendik, Subrata Banik, Tim Wawrzynczak, Nick Vaccaro, Kane Chen. Hello Bora Guvendik, build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Nick Vaccaro, Kane Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68636 to look at the new patch set (#3). Change subject: mb/google/brya/var/skolas: disable Tccold Handshake ...................................................................... mb/google/brya/var/skolas: disable Tccold Handshake The patch disables Tccold Handshake to prevent possible display flicker issue for skolas board. Please refer Intel doc#723158 for more information. BUG=b:221461379 BRANCH=firmware-brya-14505.B TEST=Verify the build for skolas board Signed-off-by: Selma Bensaid <selma.bensaid(a)intel.com> Change-Id: Ic184a61c27abd729667cd181d8f9954f58b67856 --- M src/mainboard/google/brya/variants/skolas/overridetree.cb M src/mainboard/google/brya/variants/skolas4es/overridetree.cb 2 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/68636/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68636 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic184a61c27abd729667cd181d8f9954f58b67856 Gerrit-Change-Number: 68636 Gerrit-PatchSet: 3 Gerrit-Owner: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brya/var/skolas: disable Tccold Handshake
by Selma Bensaid (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Bora Guvendik, Selma Bensaid, Tim Wawrzynczak, Kane Chen. Hello Bora Guvendik, build bot (Jenkins), Tim Wawrzynczak, Kane Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68636 to look at the new patch set (#2). Change subject: mb/google/brya/var/skolas: disable Tccold Handshake ...................................................................... mb/google/brya/var/skolas: disable Tccold Handshake The patch disables Tccold Handshake to prevent possible display flicker issue for skolas board. Please refer Intel doc#723158 for more information. BUG=b:221461379 TEST=Verify the build for skolas board Signed-off-by: Selma Bensaid <selma.bensaid(a)intel.com> Change-Id: Ic184a61c27abd729667cd181d8f9954f58b67856 --- M src/mainboard/google/brya/variants/skolas/overridetree.cb M src/mainboard/google/brya/variants/skolas4es/overridetree.cb 2 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/68636/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68636 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic184a61c27abd729667cd181d8f9954f58b67856 Gerrit-Change-Number: 68636 Gerrit-PatchSet: 2 Gerrit-Owner: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2022