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Change subject: soc/amd/acpi: Expand 5 DPTC thermal profiles acpigen support for Alib
......................................................................
Patch Set 12:
(4 comments)
File src/soc/amd/common/block/acpi/alib.c:
https://review.coreboot.org/c/coreboot/+/68470/comment/fc7fa7b1_08e01064
PS6, Line 114: DTTT
> Update the variable names to match the code.
Done
https://review.coreboot.org/c/coreboot/+/68470/comment/6b1142b9_a91aa5a8
PS6, Line 116: * Debug = "DPTC: Using thermal throllte mode SOC DPTC settings."
> Update the string here to match the code.
Done
https://review.coreboot.org/c/coreboot/+/68470/comment/b29ab8d2_83f97b5c
PS6, Line 117: THTL
> Same.
Done
https://review.coreboot.org/c/coreboot/+/68470/comment/f17f6dfb_5fc71eda
PS6, Line 123: THTT
> Same.
Done
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Change subject: soc/amd/acpi: Expand 5 DPTC thermal profiles acpigen support for Alib
......................................................................
soc/amd/acpi: Expand 5 DPTC thermal profiles acpigen support for Alib
Update acpigen_write_alib_dptc() to support extra 5 thermal profiles.
User can use these profiles for dynamic thermal table switching support.
BUG=b:232946420
TEST=emerge-skyrim coreboot
Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com>
Change-Id: I9e6d5c0fc6f492340c935899920d9ee7c9396256
---
M src/soc/amd/common/block/acpi/alib.c
M src/soc/amd/common/block/include/amdblocks/alib.h
2 files changed, 95 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/68470/12
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Change subject: soc/mediatek/mt8188: Update mtcmos settings for display and audio
......................................................................
Patch Set 7:
(1 comment)
File src/soc/mediatek/common/mtcmos.c:
https://review.coreboot.org/c/coreboot/+/68489/comment/d8f4a8e9_2b332493
PS6, Line 23: ext_buck_iso
> I am not sure about that, but I think we just keep the original modification?
I use original modification method.
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Change subject: mb/google/geralt: Configure firmware display for eDP panel
......................................................................
mb/google/geralt: Configure firmware display for eDP panel
Add eDP panel power-on sequences and initialize the display in the
ramstage.
BUG=b:244208960
TEST=see firmware display using eDP panel in MT8188 EVB.
Signed-off-by: Bo-Chen Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I67e0699c976c6f85e69d40d77154420c983b715e
---
M src/mainboard/google/geralt/Kconfig
M src/mainboard/google/geralt/Makefile.inc
A src/mainboard/google/geralt/display.c
A src/mainboard/google/geralt/display.h
M src/mainboard/google/geralt/gpio.h
M src/mainboard/google/geralt/mainboard.c
6 files changed, 105 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/68490/8
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Change subject: soc/mediatek/mt8188: Update mtcmos settings for display and audio
......................................................................
soc/mediatek/mt8188: Update mtcmos settings for display and audio
- For display, only vdosys0_pwr_con and edp_tx_pwr_con settings are
required.
- For audio, it requires powering on adsp_ao_pwr_con,
adsp_infra_pwr_con and audio_pwr_con.
- Add new power domain data `ext_buck_iso_bits` for buck isolation
control.
BUG=b:244208960
TEST=access display registers successfully.
Signed-off-by: Bo-Chen Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I7f00bda0cc5c7f8dea55a564a0ff10ae601115b3
---
M src/soc/mediatek/common/include/soc/mtcmos.h
M src/soc/mediatek/common/mtcmos.c
M src/soc/mediatek/mt8188/Makefile.inc
M src/soc/mediatek/mt8188/include/soc/spm.h
A src/soc/mediatek/mt8188/mtcmos.c
5 files changed, 54 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/68489/7
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Change subject: soc/intel/common: Clean up includes
......................................................................
Patch Set 1: Code-Review+1
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Change subject: soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles
......................................................................
soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles
Expand extra 5 DPTC thermal related profiles for
Dynamic Thermal Table Switching support.
BRANCH=none
BUG=b:232946420
TEST=emerge-skyrim coreboot
Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com>
Change-Id: Ie03de155325cbb340fce09848327ff7fa33ab1fd
---
M src/soc/amd/mendocino/chip.h
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git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/68469/8
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Change subject: soc/intel/{adl, cmn}: Allow config to select the OCP W/A
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......................................................................
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