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Hello Felix Singer, build bot (Jenkins), Furquan Shaikh, Mariusz Szafrański, Paul Menzel, Angel Pons, Subrata Banik, Aaron Durbin, Patrick Rudolph, Lance Zhao, Nico Huber, Tim Wawrzynczak, Suresh Bellampalli, Tim Wawrzynczak, Vanessa Eusebio, Michal Motyl,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57930
to look at the new patch set (#19).
Change subject: soc/intel/*: only enable PM Timer emulation if the PM Timer is disabled
......................................................................
soc/intel/*: only enable PM Timer emulation if the PM Timer is disabled
uCode PM Timer emulation is only needed when the hardware PM ACPI timer
is disabled. Also, since it redirects any register accesses to uCode,
it overrides the hardware PM Timer. Thus, only enable emulation
when required.
Change-Id: I60a775bd6eb4206750f606ce8a8777d2e2dfb579
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/alderlake/cpu.c
M src/soc/intel/cannonlake/cpu.c
M src/soc/intel/denverton_ns/cpu.c
M src/soc/intel/elkhartlake/cpu.c
M src/soc/intel/icelake/cpu.c
M src/soc/intel/jasperlake/cpu.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/tigerlake/cpu.c
8 files changed, 16 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/57930/19
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Attention is currently required from: Lance Zhao, Felix Singer, Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Paul Menzel, Angel Pons, Subrata Banik, Kyösti Mälkki, Patrick Rudolph.
Hello Felix Singer, Lance Zhao, build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Tim Wawrzynczak, Paul Menzel, Angel Pons, Subrata Banik, Kyösti Mälkki, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57933
to look at the new patch set (#27).
Change subject: soc/intel: transition full control over PM Timer from FSP to coreboot
......................................................................
soc/intel: transition full control over PM Timer from FSP to coreboot
Set `EnableTcoTimer=1` in order to keep FSP from
1) enabling ACPI Timer emulation in uCode.
2) disabling the PM ACPI Timer.
Both actions are now done in coreboot.
`EnableTcoTimer=1` makes FSP skip these steps in any possible case
including `SkipMpInit=0`, `SkipMpInit=1`, use of the MP PPI or FSP
Multiphase Init. This way full control is left to coreboot.
Change-Id: I8005daed732c031980ccc379375ff5b09df8dac1
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/alderlake/fsp_params.c
M src/soc/intel/cannonlake/fsp_params.c
M src/soc/intel/elkhartlake/fsp_params.c
M src/soc/intel/icelake/fsp_params.c
M src/soc/intel/jasperlake/fsp_params.c
M src/soc/intel/skylake/chip.c
M src/soc/intel/tigerlake/fsp_params.c
7 files changed, 66 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/57933/27
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Hello Felix Singer, build bot (Jenkins), Furquan Shaikh, Mariusz Szafrański, Jonathan Zhang, Paul Menzel, Angel Pons, Subrata Banik, Arthur Heymans, Patrick Rudolph, Lance Zhao, Anjaneya "Reddy" Chagam, Nico Huber, Johnny Lin, Christian Walter, Suresh Bellampalli, Tim Wawrzynczak, Vanessa Eusebio, Michal Motyl, Tim Chu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57932
to look at the new patch set (#27).
Change subject: soc/intel/{skl,cnl,dnv,xeon_sp}: disable PM ACPI timer if chosen
......................................................................
soc/intel/{skl,cnl,dnv,xeon_sp}: disable PM ACPI timer if chosen
Disable the PM ACPI timer during PMC init, when `USE_PM_ACPI_TIMER` is
disabled. This is done to bring SKL and CNL in line with the other
platforms, in order to transition handling of the PM timer from FSP to
coreboot in the follow-up changes.
For SKL and CNL, this temporarly redundantly disables the PM Timer,
since FSP does that, too. This redundancy is resolved in the follow-up.
Change-Id: I47280cd670a96c8fa5af107986496234f04e1f77
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/cannonlake/pmc.c
M src/soc/intel/denverton_ns/Kconfig
M src/soc/intel/denverton_ns/include/soc/pmc.h
M src/soc/intel/denverton_ns/pmc.c
M src/soc/intel/skylake/pmc.c
M src/soc/intel/xeon_sp/Kconfig
M src/soc/intel/xeon_sp/include/soc/pmc.h
M src/soc/intel/xeon_sp/pmc.c
8 files changed, 44 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/57932/27
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Hello Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58020
to look at the new patch set (#10).
Change subject: soc/intel: implement ACPI timer disabling per SoC and drop common code
......................................................................
soc/intel: implement ACPI timer disabling per SoC and drop common code
Since it's just a one-liner, implement disabling of the ACPI timer in
soc code. This reduces complexity.
Change-Id: I434ea87d00f6e919983d9229f79d4adb352fbf27
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/pmc.c
M src/soc/intel/common/block/include/intelblocks/pmclib.h
M src/soc/intel/common/block/pmc/Kconfig
M src/soc/intel/common/block/pmc/pmclib.c
M src/soc/intel/elkhartlake/Kconfig
M src/soc/intel/elkhartlake/pmc.c
M src/soc/intel/icelake/Kconfig
M src/soc/intel/icelake/pmc.c
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/jasperlake/pmc.c
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/tigerlake/pmc.c
13 files changed, 5 insertions(+), 28 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/58020/10
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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58019
to look at the new patch set (#10).
Change subject: soc/intel: move disabling of PM Timer to SoC PMC code
......................................................................
soc/intel: move disabling of PM Timer to SoC PMC code
Move disabling of PM Timer to SoC PMC code, since `finalize` is not the
right place for this.
Change-Id: I354c3aea0c8c1f8ff3d698e0636932b7b76125f7
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/alderlake/finalize.c
M src/soc/intel/alderlake/pmc.c
M src/soc/intel/elkhartlake/finalize.c
M src/soc/intel/elkhartlake/pmc.c
M src/soc/intel/icelake/finalize.c
M src/soc/intel/icelake/pmc.c
M src/soc/intel/jasperlake/finalize.c
M src/soc/intel/jasperlake/pmc.c
M src/soc/intel/tigerlake/finalize.c
M src/soc/intel/tigerlake/pmc.c
10 files changed, 45 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/58019/10
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Hello Felix Singer, Lance Zhao, build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Tim Wawrzynczak, Paul Menzel, Angel Pons, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#10).
Change subject: soc/intel/pmc: add a note about legacy OSes/payloads to PM Timer Kconfig
......................................................................
soc/intel/pmc: add a note about legacy OSes/payloads to PM Timer Kconfig
Since ACPI 5.0A it is allowed to disable the ACPI Timer, when the
according FADT flag `ACPI_FADT_PLATFORM_CLOCK` is unset.
Starting with Skylake, most platforms (except Xeon-SP) support PM Timer
emulation, so even legacy OSes and payloads should work fine with the
hardware PM Timer disabled. However, when the `TMR_STS` functionality
is required, some legacy OSes might still not work (properly).
Add a note about this to the Kconfig help.
Change-Id: I53f1814113902124779ed85da030374439570688
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/common/block/pmc/Kconfig
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/58018/10
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Hello Felix Singer, Lance Zhao, build bot (Jenkins), Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Paul Menzel, Angel Pons, Subrata Banik, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#18).
Change subject: soc/intel/{common,apl,glk}: guard PM Timer option on SoCs w/o PM Timer
......................................................................
soc/intel/{common,apl,glk}: guard PM Timer option on SoCs w/o PM Timer
Apollo Lake and Gemini Lake do not have a hardware PM ACPI timer but
only uCode PM Timer emulation. Add a Kconfig `NO_PM_ACPI_TIMER` denoting
SoCs without PM Timer and make it mutually exclusive with the Kconfig
`USE_PM_ACPI_TIMER`.
Change-Id: Ic323bbfb7089c53a6f22724910a0ff3df8904ebd
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/common/block/pmc/Kconfig
2 files changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/57931/18
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Attention is currently required from: Felix Singer, Furquan Shaikh, Mariusz Szafrański, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph, Lance Zhao, Nico Huber, Tim Wawrzynczak, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl.
Hello Felix Singer, build bot (Jenkins), Furquan Shaikh, Mariusz Szafrański, Paul Menzel, Angel Pons, Subrata Banik, Patrick Rudolph, Lance Zhao, Nico Huber, Tim Wawrzynczak, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#24).
Change subject: soc/intel/{common,skl}: set ACPI_FADT_PLATFORM_CLOCK based on Kconfig
......................................................................
soc/intel/{common,skl}: set ACPI_FADT_PLATFORM_CLOCK based on Kconfig
The FADT contains a flag `ACPI_FADT_PLATFORM_CLOCK` telling the OSPM if
a specification-compliant PM Timer is present. Currently, this flag is
set regardless of the timer being enabled or disabled.
To be specification-compliant, only set that flag, when the hardware PM
Timer is enabled. This changes behaviour of:
- all mainboards defaulting to USE_PM_ACPI_TIMER=n
- Apollo Lake and Gemini Lake, which do not have a hardware PM timer
Note: On platforms supporting uCode PM ACPI Timer emulation, this is
required, too, because emulation does not support `TMR_STS`. Any
OS or software checking this flag and thus relying on the overflow
flag would not work (properly).
Change-Id: Id2e5d69b5515c21e6ce922dab2cb88b494c65ebe
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/skylake/fadt.c
2 files changed, 8 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/57934/24
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