coreboot-gerrit October 2021

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Change in coreboot[master]: soc/mediatek/mt8195: add tracker dump
by Rex-BC Chen (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58243 ) Change subject: soc/mediatek/mt8195: add tracker dump ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/58243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If457f4a096cd63038bf6b40552aa3caaba33d5fd Gerrit-Change-Number: 58243 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 12 Oct 2021 10:56:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: add tracker dump
by build bot (Jenkins) (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Hung-Te Lin. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58243 ) Change subject: soc/mediatek/mt8195: add tracker dump ...................................................................... Patch Set 1: (1 comment) File src/soc/mediatek/common/tracker.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130277): https://review.coreboot.org/c/coreboot/+/58243/comment/a6ce1111_5d28864b PS1, Line 71: * bit[14] - BUS_OT_WEN_CTRL 'OT' may be misspelled - perhaps 'TO'? -- To view, visit https://review.coreboot.org/c/coreboot/+/58243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If457f4a096cd63038bf6b40552aa3caaba33d5fd Gerrit-Change-Number: 58243 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Tue, 12 Oct 2021 10:55:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8192: add tracker dump
by Rex-BC Chen (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Hung-Te Lin, Xi Chen. Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58244 ) Change subject: soc/mediatek/mt8192: add tracker dump ...................................................................... soc/mediatek/mt8192: add tracker dump Tracker is a debugging tool, include AP/INFRA/PERI tracker. When bus timeout occurs, the system reboots and latches some values which could be used for debug. Signed-off-by: Zhenguo Li <ot_zhenguo.li(a)mediatek.corp-partner.google.com> Change-Id: I82f8e6e5f8ccb7f8246cae45a01a3ddd5f2966f2 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h M src/soc/mediatek/mt8192/soc.c 3 files changed, 11 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/58244/1 diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 934b688..d713e4d 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -63,6 +63,7 @@ ramstage-y += soc.c ramstage-y += ../common/spm.c spm.c ramstage-y += ../common/sspm.c +ramstage-y += ../common/tracker.c ramstage-y += ../common/timer.c ramstage-y += ../common/uart.c ramstage-y += ../common/ufs.c diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h index 8dd76d9..440f7ca 100644 --- a/src/soc/mediatek/mt8192/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h @@ -4,10 +4,11 @@ #define __SOC_MEDIATEK_MT8192_INCLUDE_SOC_ADDRESSMAP_H__ enum { - MCUSYS_BASE = 0x0C530000, - MCUPM_SRAM_BASE = 0x0C540000, - MCUPM_CFG_BASE = 0x0C560000, - IO_PHYS = 0x10000000, + MCUSYS_BASE = 0x0C530000, + MCUPM_SRAM_BASE = 0x0C540000, + MCUPM_CFG_BASE = 0x0C560000, + BUS_TRACE_MONITOR_BASE = 0x0D040000, + IO_PHYS = 0x10000000, }; enum { @@ -35,10 +36,13 @@ DEVAPC_PERI2_AO_BASE = IO_PHYS + 0x00038000, DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0003C000, DEVAPC_FMEM_AO_BASE = IO_PHYS + 0x00044000, + DBG_TRACKER_BASE = IO_PHYS + 0x00208000, + PERI_TRACKER_BASE = IO_PHYS + 0x00218000, I2C_DMA_BASE = IO_PHYS + 0x00217080, EMI_BASE = IO_PHYS + 0x00219000, EMI_MPU_BASE = IO_PHYS + 0x00226000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000, + INFRA_TRACKER_BASE = IO_PHYS + 0x00314000, SSPM_SRAM_BASE = IO_PHYS + 0x00400000, SSPM_CFG_BASE = IO_PHYS + 0x00440000, SCP_CFG_BASE = IO_PHYS + 0x00700000, diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index 006a212..355827a 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -9,6 +9,7 @@ #include <soc/mcupm.h> #include <soc/mmu_operations.h> #include <soc/sspm.h> +#include <soc/tracker_common.h> #include <soc/ufs.h> #include <symbols.h> @@ -33,6 +34,7 @@ if (CONFIG(MTK_DFD)) dfd_init(); ufs_disable_refclk(); + bustracker_init(); } static struct device_operations soc_ops = { -- To view, visit https://review.coreboot.org/c/coreboot/+/58244 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82f8e6e5f8ccb7f8246cae45a01a3ddd5f2966f2 Gerrit-Change-Number: 58244 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8195: add tracker dump
by Rex-BC Chen (Code Review) 12 Oct '21

12 Oct '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58243 ) Change subject: soc/mediatek/mt8195: add tracker dump ...................................................................... soc/mediatek/mt8195: add tracker dump Tracker is a debugging tool, include AP/INFRA/PERI tracker. When bus timeout occurs, the system reboots and latches some values which could be used for debug. Signed-off-by: Zhenguo Li <ot_zhenguo.li(a)mediatek.corp-partner.google.com> Change-Id: If457f4a096cd63038bf6b40552aa3caaba33d5fd --- A src/soc/mediatek/common/include/soc/tracker_common.h A src/soc/mediatek/common/tracker.c M src/soc/mediatek/mt8195/Makefile.inc M src/soc/mediatek/mt8195/include/soc/addressmap.h M src/soc/mediatek/mt8195/soc.c 5 files changed, 176 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/58243/1 diff --git a/src/soc/mediatek/common/include/soc/tracker_common.h b/src/soc/mediatek/common/include/soc/tracker_common.h new file mode 100644 index 0000000..a68d329 --- /dev/null +++ b/src/soc/mediatek/common/include/soc/tracker_common.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_COMMON_TRACKER_H +#define SOC_MEDIATEK_COMMON_TRACKER_H + +#define BUS_DBG_CON 0x000 +#define BUS_DBG_TIMER_CON0 0x004 +#define BUS_DBG_TIMER_CON1 0x008 +#define BUS_TRACE_CON_1 0x900 +#define BUS_TRACE_CON_AO_1 0x9FC +#define BUS_TRACE_CON_2 0xA00 +#define BUS_TRACE_CON_AO_2 0xAFC +#define BUS_TRACE_EN 16 + +#define SYS_TRACK_ENTRY 64 +#define INFRA_ENTRY_NUM 32 +#define PERI_ENTRY_NUM 16 + +#define AR_TRACK_OFFSET 0x0100 +#define AW_TRACK_OFFSET 0x0300 + +#define BUSTRACKER_TIMEOUT 0x300 + +#define BUS_DBG_CON_IRQ_AR_STA0 0x00000100 +#define BUS_DBG_CON_IRQ_AW_STA0 0x00000200 +#define BUS_DBG_CON_IRQ_AR_STA1 0x00100000 +#define BUS_DBG_CON_IRQ_AW_STA1 0x00200000 +#define BUS_DBG_CON_TIMEOUT (BUS_DBG_CON_IRQ_AR_STA0 | BUS_DBG_CON_IRQ_AW_STA0 | \ + BUS_DBG_CON_IRQ_AR_STA1 | BUS_DBG_CON_IRQ_AW_STA1) + +enum { + TRACKER_SYSTRACKER = 0, + TRACKER_INFRATRACKER, + TRACKER_PERISYSTRACKER, + TRACKER_NUM, +}; + +void bustracker_init(void); + +#endif diff --git a/src/soc/mediatek/common/tracker.c b/src/soc/mediatek/common/tracker.c new file mode 100644 index 0000000..6d4e6b2 --- /dev/null +++ b/src/soc/mediatek/common/tracker.c @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <stdio.h> +#include <console/console.h> +#include <device/mmio.h> +#include <soc/addressmap.h> +#include <soc/tracker_common.h> + +static struct tracker { + uintptr_t base_addr; + u32 timeout; + u32 entry; + u32 offset[2]; + const char *str; +} tracker_data[TRACKER_NUM] = { + [TRACKER_SYSTRACKER] = { + .base_addr = DBG_TRACKER_BASE, + .timeout = BUS_DBG_CON_TIMEOUT, + .entry = SYS_TRACK_ENTRY, + .offset[0] = AR_TRACK_OFFSET, + .offset[1] = AW_TRACK_OFFSET, + .str = "systracker", + }, + [TRACKER_INFRATRACKER] = { + .base_addr = INFRA_TRACKER_BASE, + .timeout = BUSTRACKER_TIMEOUT, + .entry = INFRA_ENTRY_NUM, + .offset[0] = AR_TRACK_OFFSET, + .offset[1] = AW_TRACK_OFFSET, + .str = "infra_tracker", + }, + [TRACKER_PERISYSTRACKER] = { + .base_addr = PERI_TRACKER_BASE, + .timeout = BUSTRACKER_TIMEOUT, + .entry = PERI_ENTRY_NUM, + .offset[0] = AR_TRACK_OFFSET, + .offset[1] = AW_TRACK_OFFSET, + .str = "peri_tracker", + }, +}; + +static void setup_init(void) +{ + u32 val; + /* + * Set infra/peri tracker timeout. + * timeout = clock_in_mhz * 1000 / 16 * timeout_in_ms + * + * timeout: 200ms + * infra tracker clock: 156MHz + * peri tracker clock: 78MHz + */ + val = 156 * 1000 / 16 * 200; + write32((void *)(INFRA_TRACKER_BASE + BUS_DBG_TIMER_CON0), val); + write32((void *)(INFRA_TRACKER_BASE + BUS_DBG_TIMER_CON1), val); + + val = 78 * 1000 / 16 * 200; + write32((void *)(PERI_TRACKER_BASE + BUS_DBG_TIMER_CON0), val); + write32((void *)(PERI_TRACKER_BASE + BUS_DBG_TIMER_CON1), val); + + /* Enable infra/peri tracer because tracker and tracer share the same enable bit. */ + write32((void *)(BUS_TRACE_MONITOR_BASE + BUS_TRACE_CON_1), 1 << BUS_TRACE_EN); + write32((void *)(BUS_TRACE_MONITOR_BASE + BUS_TRACE_CON_2), 1 << BUS_TRACE_EN); + + /* + * Enable infra/peri tracker. + * bit[0] - BUS_DBG_EN + * bit[1] - TIMEOUT_EN + * bit[2] - SLV_ERR_EN + * bit[13] - HALT_ON_TIMEOUT_EN + * bit[14] - BUS_OT_WEN_CTRL + */ + val = BIT(0) | BIT(1) | BIT(2) | BIT(13) | BIT(14); + write32((void *)(BUS_TRACE_MONITOR_BASE + BUS_TRACE_CON_AO_1), val); + write32((void *)(BUS_TRACE_MONITOR_BASE + BUS_TRACE_CON_AO_2), val); + +} + +static void tracker_dump_data(void) +{ + int i, j, k; + int size; + uintptr_t reg; + struct tracker *tra; + + for (j = 0; j < TRACKER_NUM; j++) { + tra = &tracker_data[j]; + + if (!(read32((void *)(tra->base_addr)) & tra->timeout)) + continue; + + printk(BIOS_INFO, "**Dump %s debug register start**\n", tra->str); + for (k = 0; k < 2; k++) { + /* + * for systracker: + * offset[0] dump from offset 0x100 ~ 0x2F8. + * offset[1] dump from offset 0x300 ~ 0x4FC + * + * for infra tracker: + * offset[0] dump from offset 0x100 ~ 0x1F8 + * offset[1] dump from offset 0x300 ~ 0x3FC + * + * for perisys tracker: + * offset[0] dump from offset 0x100 ~ 0x2F8 + * offset[1] dump from offset 0x300 ~ 0x4FC + */ + size = 2 * tra->entry; + for (i = 0; i < size; i++) { + reg = tra->base_addr + tra->offset[k] + i * 4; + printk(BIOS_INFO, "%#lx:%#x,", reg, read32((void *)reg)); + + if (i % 4 == 3 || i == size - 1) + printk(BIOS_INFO, "\n"); + } + } + + printk(BIOS_INFO, "**Dump %s debug register end**\n", tra->str); + } +} + +void bustracker_init(void) +{ + tracker_dump_data(); + setup_init(); +} diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index 6540ce2..5d444c7 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -48,7 +48,7 @@ romstage-y += mt6691.c romstage-y += mt6360.c romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c - +ramstage-y += ../common/tracker.c ramstage-y += ../common/auxadc.c ramstage-y += ../common/ddp.c ddp.c ramstage-y += devapc.c diff --git a/src/soc/mediatek/mt8195/include/soc/addressmap.h b/src/soc/mediatek/mt8195/include/soc/addressmap.h index 3ddaa54..88b545a 100644 --- a/src/soc/mediatek/mt8195/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8195/include/soc/addressmap.h @@ -4,10 +4,11 @@ #define __SOC_MEDIATEK_MT8195_INCLUDE_SOC_ADDRESSMAP_H__ enum { - MCUSYS_BASE = 0x0C530000, - MCUPM_SRAM_BASE = 0x0C540000, - MCUPM_CFG_BASE = 0x0C560000, - IO_PHYS = 0x10000000, + MCUSYS_BASE = 0x0C530000, + MCUPM_SRAM_BASE = 0x0C540000, + MCUPM_CFG_BASE = 0x0C560000, + BUS_TRACE_MONITOR_BASE = 0x0D040000, + IO_PHYS = 0x10000000, }; enum { @@ -35,12 +36,15 @@ DEVAPC_PERI2_AO_BASE = IO_PHYS + 0x00038000, DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0003C000, DEVAPC_FMEM_AO_BASE = IO_PHYS + 0x00044000, + DBG_TRACKER_BASE = IO_PHYS + 0x00208000, + PERI_TRACKER_BASE = IO_PHYS + 0x00218000, EMI0_BASE = IO_PHYS + 0x00219000, EMI1_BASE = IO_PHYS + 0x0021D000, I2C_DMA_BASE = IO_PHYS + 0x00220080, EMI1_SUB_BASE = IO_PHYS + 0x00225000, EMI0_MPU_BASE = IO_PHYS + 0x00226000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000, + INFRA_TRACKER_BASE = IO_PHYS + 0x00314000, SSPM_SRAM_BASE = IO_PHYS + 0x00400000, SSPM_CFG_BASE = IO_PHYS + 0x00440000, SCP_CFG_BASE = IO_PHYS + 0x00700000, diff --git a/src/soc/mediatek/mt8195/soc.c b/src/soc/mediatek/mt8195/soc.c index 3991964..20bd226 100644 --- a/src/soc/mediatek/mt8195/soc.c +++ b/src/soc/mediatek/mt8195/soc.c @@ -9,6 +9,7 @@ #include <soc/mcupm.h> #include <soc/mmu_operations.h> #include <soc/sspm.h> +#include <soc/tracker_common.h> #include <soc/ufs.h> #include <symbols.h> @@ -35,6 +36,7 @@ ufs_disable_refclk(); hdmi_low_power_setting(); + bustracker_init(); } static struct device_operations soc_ops = { -- To view, visit https://review.coreboot.org/c/coreboot/+/58243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If457f4a096cd63038bf6b40552aa3caaba33d5fd Gerrit-Change-Number: 58243 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: libpayload: Add unit-tests framework and first test case
by Jakub Czapiga (Code Review) 12 Oct '21

12 Oct '21

Jakub Czapiga has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/58242 ) Change subject: libpayload: Add unit-tests framework and first test case ...................................................................... libpayload: Add unit-tests framework and first test case This commit adds a unit-tests framewok ported from coreboot, and test for drivers/speaker. Usage of the unit-tests framework is same as for the coreboot one. Change-Id: Iaa94ee4dcdc3f74af830113813df0e8fb0b31e4f Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> --- M payloads/libpayload/Makefile M payloads/libpayload/Makefile.inc A payloads/libpayload/configs/config.unit-tests A payloads/libpayload/tests/Makefile.inc A payloads/libpayload/tests/drivers/Makefile.inc A payloads/libpayload/tests/drivers/speaker-test.c A payloads/libpayload/tests/include/mocks/x86_io.h A payloads/libpayload/tests/include/tests/test.h M util/testing/Makefile.inc 9 files changed, 543 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/58242/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58242 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa94ee4dcdc3f74af830113813df0e8fb0b31e4f Gerrit-Change-Number: 58242 Gerrit-PatchSet: 2 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/braswell: Set GNVS DPTE via devicetree
by Sumeet R Pawnikar (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Angel Pons, Arthur Heymans, Michael Niewöhner, Patrick Rudolph, Wim Vervoorn. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57988 ) Change subject: soc/intel/braswell: Set GNVS DPTE via devicetree ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57988/comment/c66b3d99_29ecf6cb PS1, Line 10: field, as newer Intel platforms do. > What should be tested? This change only does some refactoring. Check "status dptf" on terminal. It should show process with status running. -- To view, visit https://review.coreboot.org/c/coreboot/+/57988 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88b746c64ca57604f946eefb00a70487a2fb27c0 Gerrit-Change-Number: 57988 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Comment-Date: Tue, 12 Oct 2021 10:30:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/baytrail: Set GNVS DPTE via devicetree
by Sumeet R Pawnikar (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Angel Pons, Arthur Heymans, Michael Niewöhner, Patrick Rudolph. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57986 ) Change subject: soc/intel/baytrail: Set GNVS DPTE via devicetree ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/57986 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5739bf3d56882b8b3516d7ebfe44d94807ee7ab Gerrit-Change-Number: 57986 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 12 Oct 2021 10:28:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/brask: Init overridetree
by Sumeet R Pawnikar (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: David Wu, Tim Wawrzynczak, Paul Menzel, Alan Huang. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58165 ) Change subject: mb/google/brya/variants/brask: Init overridetree ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/58165 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30d26a47fe93736c63b578c9180b148ef73e8b9f Gerrit-Change-Number: 58165 Gerrit-PatchSet: 3 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 12 Oct 2021 10:27:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/denverton_ns: Set up LAPIC in pre MP init to fix SeaBIOS hang
by Дмитрий Понаморев (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Felix Singer, Michał Żygowski, Mariusz Szafrański, Vanessa Eusebio, Angel Pons. Дмитрий Понаморев has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57668 ) Change subject: soc/intel/denverton_ns: Set up LAPIC in pre MP init to fix SeaBIOS hang ...................................................................... Patch Set 6: (2 comments) Patchset: PS6: > Unfortunately adding setup_i8259(); i8259_configure_irq_trigger(9, 1); and isa_dma_init() to the lpc […] Mark as unresolved. Please tell me what further actions on my part? PS6: Mark as unresolved. Please tell me what further actions on my part? -- To view, visit https://review.coreboot.org/c/coreboot/+/57668 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafbfb733d0be546e0e2fba937fd1d262785aa54d Gerrit-Change-Number: 57668 Gerrit-PatchSet: 6 Gerrit-Owner: Дмитрий Понаморев <dponamorev(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: King Sumo <kingsumos(a)gmail.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 12 Oct 2021 10:23:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Дмитрий Понаморев <dponamorev(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/pc80/tpm: Fix wrong debug message
by Kyösti Mälkki (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Patrick Rudolph, Christian Walter, Arthur Heymans, Werner Zeh, Angel Pons. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58155 ) Change subject: drivers/pc80/tpm: Fix wrong debug message ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58155 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic28ee5a07146e804574b887ea05c62e7e88e9078 Gerrit-Change-Number: 58155 Gerrit-PatchSet: 1 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 12 Oct 2021 10:06:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit October 2021