coreboot-gerrit January 2018

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Change in coreboot[master]: Fix gitconfig waiting for user input
by Alex Thiessen (Code Review) 02 Jan '18

02 Jan '18

Alex Thiessen has uploaded this change for review. ( https://review.coreboot.org/23059 Change subject: Fix gitconfig waiting for user input ...................................................................... Fix gitconfig waiting for user input When running `make gitconfig` on a freshly cloned repository, the script will wait for user input in a call to `sed`, caused by a spurious newline introduced in commit 9ab8ae6a55681874ec194bc144077ded5363a317. Change-Id: I2aa722c052d24dcffa9688df09bcf8dc767bd0b6 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> --- M util/gitconfig/gitconfig.sh 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/23059/1 diff --git a/util/gitconfig/gitconfig.sh b/util/gitconfig/gitconfig.sh index 116e7fb..5f91a69 100755 --- a/util/gitconfig/gitconfig.sh +++ b/util/gitconfig/gitconfig.sh @@ -16,7 +16,7 @@ if [ -d $hooks ]; then if [ util/gitconfig/commit-msg -nt $hooks/commit-msg ] || \ [ ! -x $hooks/commit-msg ]; then - sed -e "s,%MAKE%,remake,g" + sed -e "s,%MAKE%,remake,g" \ util/gitconfig/commit-msg > $hooks/commit-msg chmod +x $hooks/commit-msg fi -- To view, visit https://review.coreboot.org/23059 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2aa722c052d24dcffa9688df09bcf8dc767bd0b6 Gerrit-Change-Number: 23059 Gerrit-PatchSet: 1 Gerrit-Owner: Alex Thiessen <alex.thiessen.de(a)gmail.com>

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Change in coreboot[master]: Fix gitconfig waiting for user input
by Alex Thiessen (Code Review) 02 Jan '18

02 Jan '18

Alex Thiessen has abandoned this change. ( https://review.coreboot.org/23058 ) Change subject: Fix gitconfig waiting for user input ...................................................................... Abandoned moving to another gerrit account -- To view, visit https://review.coreboot.org/23058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: I616e94f6e951dddbe951e65ebc74eb1d4dc40d2a Gerrit-Change-Number: 23058 Gerrit-PatchSet: 1 Gerrit-Owner: Alex Thiessen <pandokos+coreboot(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: Fix gitconfig waiting for user input
by build bot (Jenkins) (Code Review) 02 Jan '18

02 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23058 ) Change subject: Fix gitconfig waiting for user input ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19871/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65129/ : SUCCESS -- To view, visit https://review.coreboot.org/23058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I616e94f6e951dddbe951e65ebc74eb1d4dc40d2a Gerrit-Change-Number: 23058 Gerrit-PatchSet: 1 Gerrit-Owner: Alex Thiessen <pandokos+coreboot(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 02 Jan 2018 01:43:40 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: Fix gitconfig waiting for user input
by Alex Thiessen (Code Review) 02 Jan '18

02 Jan '18

Alex Thiessen has uploaded this change for review. ( https://review.coreboot.org/23058 Change subject: Fix gitconfig waiting for user input ...................................................................... Fix gitconfig waiting for user input When running `make gitconfig` on a freshly cloned repository, the script will wait for user input in a call to `sed`, caused by a spurious newline introduced in commit 9ab8ae6a55681874ec194bc144077ded5363a317. Change-Id: I616e94f6e951dddbe951e65ebc74eb1d4dc40d2a Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> --- M util/gitconfig/gitconfig.sh 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/23058/1 diff --git a/util/gitconfig/gitconfig.sh b/util/gitconfig/gitconfig.sh index 116e7fb..5f91a69 100755 --- a/util/gitconfig/gitconfig.sh +++ b/util/gitconfig/gitconfig.sh @@ -16,7 +16,7 @@ if [ -d $hooks ]; then if [ util/gitconfig/commit-msg -nt $hooks/commit-msg ] || \ [ ! -x $hooks/commit-msg ]; then - sed -e "s,%MAKE%,remake,g" + sed -e "s,%MAKE%,remake,g" \ util/gitconfig/commit-msg > $hooks/commit-msg chmod +x $hooks/commit-msg fi -- To view, visit https://review.coreboot.org/23058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I616e94f6e951dddbe951e65ebc74eb1d4dc40d2a Gerrit-Change-Number: 23058 Gerrit-PatchSet: 1 Gerrit-Owner: Alex Thiessen <pandokos+coreboot(a)gmail.com>

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Change in coreboot[master]: util/inteltool: Add Skylake Desktop Northbridge
by build bot (Jenkins) (Code Review) 01 Jan '18

01 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23055 ) Change subject: util/inteltool: Add Skylake Desktop Northbridge ...................................................................... Patch Set 6: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19870/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65128/ : SUCCESS -- To view, visit https://review.coreboot.org/23055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id746d1e8b3bb90b3b68a2f6c372890671dd61b5f Gerrit-Change-Number: 23055 Gerrit-PatchSet: 6 Gerrit-Owner: Christoph Pomaska <cp_public(a)posteo.de> Gerrit-Reviewer: Christoph Pomaska <cp_public(a)posteo.de> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 01 Jan 2018 16:29:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mainboard/google/poppy/variants/nautilus - MIPI camera asl files for ...
by build bot (Jenkins) (Code Review) 01 Jan '18

01 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23056 ) Change subject: mainboard/google/poppy/variants/nautilus - MIPI camera asl files for Nautilus ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19869/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65127/ : SUCCESS -- To view, visit https://review.coreboot.org/23056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iebd41ac3631829bbb0b008761eb67c3db3e94638 Gerrit-Change-Number: 23056 Gerrit-PatchSet: 2 Gerrit-Owner: Anonymous Coward #1001830 Gerrit-Reviewer: Rajmohan Mani <rajmohan.mani(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 01 Jan 2018 15:59:50 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/google/poppy/variants/nautilus - MIPI camera asl files for ...
by Anonymous Coward (Code Review) 01 Jan '18

01 Jan '18

Hello Rajmohan Mani, Rizwan Qureshi, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/23056 to look at the new patch set (#2). Change subject: mainboard/google/poppy/variants/nautilus - MIPI camera asl files for Nautilus ...................................................................... mainboard/google/poppy/variants/nautilus - MIPI camera asl files for Nautilus * added IMX258 sensor entity * enabled CIO2 and IMGu in devicetree.cb Change-Id: Iebd41ac3631829bbb0b008761eb67c3db3e94638 Signed-off-by: andy yeh <andy.yeh(a)intel.corp-partner.google.com> --- M src/mainboard/google/poppy/Kconfig M src/mainboard/google/poppy/variants/nautilus/devicetree.cb A src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl A src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/ipu_mainboard.asl A src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/mipi_camera.asl 5 files changed, 651 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/23056/2 -- To view, visit https://review.coreboot.org/23056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iebd41ac3631829bbb0b008761eb67c3db3e94638 Gerrit-Change-Number: 23056 Gerrit-PatchSet: 2 Gerrit-Owner: Anonymous Coward #1001830 Gerrit-Reviewer: Rajmohan Mani <rajmohan.mani(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mainboard/google/poppy/variants/nautilus - MIPI camera asl files for ...
by build bot (Jenkins) (Code Review) 01 Jan '18

01 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23056 ) Change subject: mainboard/google/poppy/variants/nautilus - MIPI camera asl files for Nautilus ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/65126/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/19868/ : SUCCESS -- To view, visit https://review.coreboot.org/23056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iebd41ac3631829bbb0b008761eb67c3db3e94638 Gerrit-Change-Number: 23056 Gerrit-PatchSet: 1 Gerrit-Owner: Anonymous Coward #1001830 Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 01 Jan 2018 15:45:02 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/google/poppy/variants/nautilus - MIPI camera asl files for ...
by Anonymous Coward (Code Review) 01 Jan '18

01 Jan '18

Anonymous Coward #1001830 has uploaded this change for review. ( https://review.coreboot.org/23056 Change subject: mainboard/google/poppy/variants/nautilus - MIPI camera asl files for Nautilus ...................................................................... mainboard/google/poppy/variants/nautilus - MIPI camera asl files for Nautilus * added IMX258 sensor entity * enabled CIO2 and IMGu in devicetree.cb * On Pre-EVT/EVT the USB and MIPI share the same power source. * before HW fix, temporarily disabled turn off 3V3_VDD BUG=b:70644925 BRANCH=Master TEST=test on Nautilus boards to enable camera pin control by PMIC Change-Id: Iebd41ac3631829bbb0b008761eb67c3db3e94638 Signed-off-by: andy yeh <andy.yeh(a)intel.corp-partner.google.com> --- M src/mainboard/google/poppy/Kconfig M src/mainboard/google/poppy/variants/nautilus/devicetree.cb A src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl A src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/ipu_mainboard.asl A src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/mipi_camera.asl 5 files changed, 656 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/23056/1 diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index 9315d96..1734ac0 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -136,6 +136,7 @@ select DRIVERS_GENERIC_MAX98357A select DRIVERS_I2C_DA7219 select DRIVERS_PS2_KEYBOARD + select VARIANT_HAS_CAMERA_ACPI select VARIANT_HAS_I2C_TPM if !VBOOT_MOCK_SECDATA config VARIANT_SPECIFIC_OPTIONS_SORAKA diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index a548ac9..2dfe858 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -38,8 +38,8 @@ register "XdciEnable" = "0" register "SsicPortEnable" = "0" register "SmbusEnable" = "1" - register "Cio2Enable" = "0" - register "SaImguEnable" = "0" + register "Cio2Enable" = "1" + register "SaImguEnable" = "1" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" diff --git a/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl b/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl new file mode 100644 index 0000000..55bd625 --- /dev/null +++ b/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/camera.asl @@ -0,0 +1,17 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "ipu_mainboard.asl" +#include "mipi_camera.asl" diff --git a/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/ipu_mainboard.asl b/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/ipu_mainboard.asl new file mode 100644 index 0000000..2e2b129 --- /dev/null +++ b/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/ipu_mainboard.asl @@ -0,0 +1,62 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (\_SB.PCI0.CIO2) +{ + /* Define two ports for CIO2 device where endpoint of port0 + is connected to CAM0 and endpoint of port1 is connected to CAM1 */ + + Name (_DSD, Package () { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package () { + Package () { "port0", "PRT0" }, + Package () { "port1", "PRT1" }, + } + }) + + Name (PRT0, Package () { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "port", 0 }, /* csi 0 */ + }, + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package () { + Package () { "endpoint0", "EP00" }, + } + }) + + Name (EP00, Package() { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "endpoint", 0 }, + Package () { "clock-lanes", 0 }, + Package () { "data-lanes", Package () { 1, 2, 3, 4 } }, + Package () { "remote-endpoint", + Package() { \_SB.PCI0.I2C2.CAM0, 0, 0 } + }, + } + }) + + Name (PRT1, Package () { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "port", 1 }, /* csi 1 */ + }, + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package () { + Package () { "endpoint0", "EP10" }, + } + }) +} diff --git a/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/mipi_camera.asl b/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/mipi_camera.asl new file mode 100644 index 0000000..61fd86c --- /dev/null +++ b/src/mainboard/google/poppy/variants/nautilus/include/variant/acpi/mipi_camera.asl @@ -0,0 +1,574 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (\_SB.PCI0.I2C2) +{ + Device (PMIC) + { + Name (_HID, "INT3472") /* _HID: Hardware ID */ + Name (_UID, Zero) /* _UID: Unique ID */ + Name (_DDN, "TPS68470 PMIC") /* _DDN: DOS Device Name */ + Name (CAMD, 0x64) + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Method (PMON, 0, Serialized) { + /* + * Turn on 3V3_VDD. It takes around 1 ms for voltage to + * settle to 3.3 Volt. Provide additional 2 ms delay. + */ + STXS(EN_PP3300_DX_CAM) + Sleep (3) + } + + Method (PMOF, 0, Serialized) { + /* Make Sure all PMIC outputs are off. */ + If (LEqual (VSIC, Zero)) { + /* + * On Pre-EVT/EVT the USB and MIPI share the same power source, + * before HW fix, temporarily disabled turn off 3V3_VDD + */ + /* CTXS(EN_PP3300_DX_CAM) */ + } + } + + Name (_PR0, Package (0x01) { CPMC }) + Name (_PR3, Package (0x01) { CPMC }) + + /* Power resource methods for PMIC */ + PowerResource (CPMC, 0, 0) { + Name (RSTO, 1) + Method (_ON, 0, Serialized) { + PMON() + /* Do not reset PMIC across S3 and S0ix cycle */ + if (Lequal (RSTO, 1)) { + CTXS(EN_CAM_PMIC_RST_L) + Sleep(1) + STXS(EN_CAM_PMIC_RST_L) + Sleep (3) + RSTO = 0 + } + } + Method (_OFF, 0, Serialized) { + PMOF() + } + Method (_STA, 0, Serialized) { + Return (GTXS(EN_PP3300_DX_CAM)) + } + } + + /* Marks the availability of all the operation regions */ + Name (AVBL, Zero) + Name (AVGP, Zero) + Name (AVB0, Zero) + Name (AVB1, Zero) + Name (AVB2, Zero) + Name (AVB3, Zero) + Method (_REG, 2, NotSerialized) + { + If (LEqual (Arg0, 0x08)) + { + /* Marks the availability of GeneralPurposeIO + * 0x08: opregion space for GeneralPurposeIO + */ + Store (Arg1, AVGP) + } + If (LEqual (Arg0, 0xB0)) + { + /* Marks the availability of + * TI_PMIC_POWER_OPREGION_ID */ + Store (Arg1, AVB0) + } + If (LEqual (Arg0, 0xB1)) + { + /* Marks the availability of + * TI_PMIC_VR_VAL_OPREGION_ID */ + Store (Arg1, AVB1) + } + If (LEqual (Arg0, 0xB2)) + { + /* Marks the availability of + * TI_PMIC_CLK_OPREGION_ID */ + Store (Arg1, AVB2) + } + If (LEqual (Arg0, 0xB3)) + { + /* Marks the availability of + * TI_PMIC_CLK_FREQ_OPREGION_ID */ + Store (Arg1, AVB3) + } + If (LAnd (AVGP, LAnd (LAnd (AVB0, AVB1), + LAnd(AVB2, AVB3)))) + { + /* Marks the availability of all opregions */ + Store (1, AVBL) + } + Else + { + Store (0, AVBL) + } + } + + OperationRegion (GPOP, GeneralPurposeIo, 0, 0x2) + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x004D, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C2", + 0x00, ResourceConsumer, , + ) + /* GPIO.1 is sensor SDA in daisy chain mode */ + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, + IoRestrictionInputOnly, "\\_SB.PCI0.I2C2.PMIC", + 0x00, ResourceConsumer,,) + { + 1 + } + /* GPIO.2 is sensor SCL in daisy chain mode */ + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, + IoRestrictionInputOnly, "\\_SB.PCI0.I2C2.PMIC", + 0x00, ResourceConsumer,,) + { + 2 + } + /* GPIO.4 is AVDD pin for user facing camera */ + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, + IoRestrictionOutputOnly, "\\_SB.PCI0.I2C2.PMIC", + 0x00, ResourceConsumer,,) + { + 4 + } + /* GPIO.5 is XSHUTDOWN pin for user facing camera */ + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, + IoRestrictionOutputOnly, "\\_SB.PCI0.I2C2.PMIC", + 0x00, ResourceConsumer,,) + { + 5 + } + /* GPIO.9 is XSHUTDOWN pin for world facing camera */ + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, + IoRestrictionOutputOnly, "\\_SB.PCI0.I2C2.PMIC", + 0x00, ResourceConsumer,,) + { + 9 + } + }) + + /* PMIC operation regions */ + /* 0xB0: TI_PMIC_POWER_OPREGION_ID + * VSIO: Sensor IO LDO output + * VCMC: VCM LDO output + * VAX1: Auxiliary LDO1 output + * VAX2: Auxiliary LDO2 output + * VACT: Analog LDO output + * VDCT: Core buck output + */ + OperationRegion (PWR1, 0xB0, Zero, 0x0100) + Field (PWR1, DWordAcc, NoLock, Preserve) + { + VSIO, 32, + VCMC, 32, + VAX1, 32, + VAX2, 32, + VACT, 32, + VDCT, 32, + } + + /* 0xB1: TI_PMIC_VR_VAL_OPREGION_ID + * SIOV: VSIO VR voltage value + * IOVA: VIO VR voltage value + * VCMV: VCM VR voltage value + * AX1V: Auxiliary LDO1 VR voltage value + * AX2V: Auxiliary LDO2 VR voltage value + * ACVA: Analog LDO VR voltage + * DCVA: Core buck VR volatage + */ + OperationRegion (PWR2, 0xB1, Zero, 0x0100) + Field (PWR2, DWordAcc, NoLock, Preserve) + { + SIOV, 32, + IOVA, 32, + VCMV, 32, + AX1V, 32, + AX2V, 32, + ACVA, 32, + DCVA, 32, + } + + /* 0xB2: TI_PMIC_CLK_OPREGION_ID + * PCTL: PLL control register + * PCT2: PLL control 2 register + * CFG1: Clock configuration 1 register + * CFG2: Clock configuration 2 register + */ + OperationRegion (CLKC, 0xB2, Zero, 0x0100) + Field (CLKC, DWordAcc, NoLock, Preserve) + { + PCTL, 32, + PCT2, 32, + CFG1, 32, + CFG2, 32, + } + + /* 0xB3: TI_PMIC_CLK_FREQ_OPREGION_ID + * PDV2: PLL output divider for HCLK_B + * BODI: PLL output divider for boost clock + * BUDI: PLL output divider for buck clock + * PSWR: PLL reference clock setting + * XTDV: Reference crystal divider + * PLDV: PLL feedback divider + * PODV: PLL output divider for HCLK_A + */ + OperationRegion (CLKF, 0xB3, Zero, 0x0100) + Field (CLKF, DWordAcc, NoLock, Preserve) + { + PDV2, 32, + BODI, 32, + BUDI, 32, + PSWR, 32, + XTDV, 32, + PLDV, 32, + PODV, 32, + } + + /* CLE0 and CLE1 are used to determine if both the clocks + are enabled or disabled. */ + Mutex (MUTC, 0) + Name (CLE0, 0) + Name (CLE1, 0) + Method (CLKE, 0, Serialized) { + /* save Acquire result so we can check for + Mutex acquired */ + Store (Acquire (MUTC, 1000), Local0) + /* check for Mutex acquired */ + If (LEqual (Local0, Zero)) { + /* Enable clocks only when a sensor is turned on and + both the clocks are disabled */ + If (LNot (LOr (CLE0, CLE1))) { + /* Set boost clock divider */ + BODI = 3 + /* Set buck clock divider */ + BUDI = 2 + /* Set the PLL_REF_CLK cyles */ + PSWR = 19 + /* Set the reference crystal divider */ + XTDV = 170 + /* Set PLL feedback divider */ + PLDV = 32 + /* Set PLL output divider for HCLK_A */ + PODV = 1 + /* Set PLL output divider for HCLK_B */ + PDV2 = 1 + /* Enable clocks for both the sensors + * CFG1: output selection for HCLK_A and + * HCLK_B. + * CFG2: set drive strength for HCLK_A + * and HCLK_B. + */ + CFG2 = 5 + CFG1 = 10 + /* Enable PLL output, crystal oscillator + * input capacitance control and set + * Xtal oscillator as clock source. + */ + PCTL = 209 + Sleep(1) + } + Release (MUTC) + } + } + + /* Clocks need to be disabled only if both the sensors are + turned off */ + Method (CLKD, 0, Serialized) { + /* save Acquire result so we can check for + Mutex acquired */ + Store (Acquire (MUTC, 1000), Local0) + /* check for Mutex acquired */ + If (LEqual (Local0, Zero)) { + If (LNot (LOr (CLE0, CLE1))) { + BODI = 0 + BUDI = 0 + PSWR = 0 + XTDV = 0 + PLDV = 0 + PODV = 0 + PDV2 = 0 + /* Disable clocks for both the + sensors */ + CFG2 = 0 + CFG1 = 0 + PCTL = 0 + } + Release (MUTC) + } + } + + /* Reference count for VSIO */ + Mutex (MUTV, 0) + Name (VSIC, 0) + Method (DOVD, 1, Serialized) { + /* Save Acquire result so we can check for + Mutex acquired */ + Store (Acquire (MUTV, 1000), Local0) + /* Check for Mutex acquired */ + If (LEqual (Local0, Zero)) { + /* Turn off VSIO */ + If (LEqual (Arg0, Zero)) { + /* Decrement only if VSIC > 0 */ + if (LGreater (VSIC, 0)) { + Decrement (VSIC) + If (LEqual (VSIC, Zero)) { + VSIO = 0 + Sleep(1) + PMOF() + } + } + } ElseIf (LEqual (Arg0, 1)) { + /* Increment only if VSIC < 4 */ + If (LLess (VSIC, 4)) { + /* Turn on VSIO */ + If (LEqual (VSIC, Zero)) { + PMON() + VSIO = 3 + + if (LNotEqual (IOVA, 52)) { + /* Set VSIO value as + 1.8006 V */ + IOVA = 52 + } + if (LNotEqual (SIOV, 52)) { + /* Set VSIO value as + 1.8006 V */ + SIOV = 52 + } + Sleep(3) + } + Increment (VSIC) + } + } + + Release (MUTV) + } + } + + /* C0GP is used to indicate if CAM0 + * GPIOs are configured as input. + */ + Name (C0GP, 0) + /* Power resource methods for CAM0 */ + PowerResource (OVTH, 0, 0) { + Name (STA, 0) + Method (_ON, 0, Serialized) { + If (LEqual (AVBL, 1)) { + If (LEqual (STA, 0)) { + If (LEqual (C0GP, 0)) { + \_SB.PCI0.I2C2.CAM0.CGP1() + \_SB.PCI0.I2C2.CAM0.CGP2() + C0GP = 1 + } + + /* Enable VSIO regulator + + daisy chain */ + DOVD(1) + + VACT = 1 + if (LNotEqual (ACVA, 109)) { + /* Set ANA at 2.8152V */ + ACVA = 109 + } + Sleep(3) + + \_SB.PCI0.I2C2.PMIC.CLKE() + CLE0 = 1 + + VDCT = 1 + if (LNotEqual (DCVA, 12)) { + /* Set CORE at 1.2V */ + DCVA = 12 + } + Sleep(3) + \_SB.PCI0.I2C2.CAM0.CRST(1) + Sleep(5) + + STA = 1 + } + } + } + + Method (_OFF, 0, Serialized) { + If (LEqual (AVBL, 1)) { + If (LEqual (STA, 1)) { + Sleep(2) + CLE0 = 0 + \_SB.PCI0.I2C2.PMIC.CLKD() + Sleep(2) + \_SB.PCI0.I2C2.CAM0.CRST(0) + Sleep(3) + VDCT = 0 + Sleep(3) + VACT = 0 + Sleep(1) + DOVD(0) + } + } + STA = 0 + } + Method (_STA, 0, NotSerialized) { + Return (STA) + } + } + } + + Device (CAM0) + { + Name (_HID, "SONY258A") /* _HID: Hardware ID */ + Name (_UID, Zero) /* _UID: Unique ID */ + Name (_DDN, "SONY IMX258 Camera") /* _DDN: DOS Device Name */ + Name (CAMD, 0x02) + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Name (_DEP, Package() { \_SB.PCI0.I2C2.PMIC }) + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x001A, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C2", + 0x00, ResourceConsumer, , + ) + }) + + Field (\_SB.PCI0.I2C2.PMIC.GPOP, ByteAcc, NoLock, Preserve) + { + Connection + ( + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, + IoRestrictionInputOnly, "\\_SB.PCI0.I2C2.PMIC", + 0x00, ResourceConsumer,,) + { + 1 + } + ), + GPO1, 1, + Connection + ( + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, + IoRestrictionInputOnly, "\\_SB.PCI0.I2C2.PMIC", + 0x00, ResourceConsumer,,) + { + 2 + } + ), + GPO2, 1, + Connection + ( + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, + IoRestrictionOutputOnly, + "\\_SB.PCI0.I2C2.PMIC", 0x00, + ResourceConsumer,,) + { + 9 + } + ), + GRST, 1, + } + + /* Set or clear GRST GPIO */ + Method (CRST, 1, Serialized) + { + GRST = Arg0 + } + + /* Read GPO1 GPIO, to configure as input */ + Method (CGP1, 0, Serialized) + { + Return (GPO1) + } + + /* Read GPO2 GPIO, to configure as input */ + Method (CGP2, 0, Serialized) + { + Return (GPO2) + } + + Name (_PR0, Package () { ^^I2C2.PMIC.OVTH }) + Name (_PR3, Package () { ^^I2C2.PMIC.OVTH }) + + /* Port0 of CAM0 is connected to port0 of CIO2 device */ + Name (_DSD, Package () { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package () { + Package () { "port0", "PRT0" }, + }, + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "clock-frequency", 19200000 }, + } + }) + + Name (PRT0, Package() { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "port", 0 }, + }, + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package () { + Package () { "endpoint0", "EP00" }, + } + }) + + Name (EP00, Package() { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "endpoint", 0 }, + Package () { "clock-lanes", 0 }, + Package () { "data-lanes", + Package () { 1, 2, 3, 4 } + }, + Package () { "link-frequencies", + Package() { 540000000, 270000000 } + }, + Package () { "remote-endpoint", + Package() { \_SB.PCI0.CIO2, 0, 0 } + }, + } + }) + + Method (SSDB, 0, Serialized) + { + Return (Buffer (0x5E) + { + /* 0000 */ 0x00, 0x50, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x03, + /* 0050 */ 0x09, 0x00, 0x02, 0x01, 0x00, 0x01, 0x00, 0x36, + /* 0058 */ 0x6E, 0x01, 0x00, 0x00, 0x00, 0x00 + }) + } + } +} + -- To view, visit https://review.coreboot.org/23056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Iebd41ac3631829bbb0b008761eb67c3db3e94638 Gerrit-Change-Number: 23056 Gerrit-PatchSet: 1 Gerrit-Owner: Anonymous Coward #1001830

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Change in coreboot[master]: mainboard/asus/am1i-a: add support for board ASUS AM1I-A
by build bot (Jenkins) (Code Review) 01 Jan '18

01 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23002 ) Change subject: mainboard/asus/am1i-a: add support for board ASUS AM1I-A ...................................................................... Patch Set 5: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/65125/ : SUCCESS -- To view, visit https://review.coreboot.org/23002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3d9432849560df81536bbb2ce4c87cd265b820f7 Gerrit-Change-Number: 23002 Gerrit-PatchSet: 5 Gerrit-Owner: Gergely Kiss <mail.gery(a)gmail.com> Gerrit-Reviewer: Gergely Kiss <mail.gery(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 01 Jan 2018 15:36:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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coreboot-gerrit January 2018