the following patch was just integrated into master:
commit d1f840be86a8af750c7b7a44907e842d7a28a061
Author: Marc Jones <marc.jones(a)se-eng.com>
Date: Thu Jan 22 16:18:49 2015 +0800
toolchain.inc: Check toolchain is installed before running it
Toolchain.inc fails with strange shell errors if the CC_$(stage)
doesn't expands correctly. The cause is that the ARCH_SUPPORTED
doesn't have the required toolchain for the stage.
Change-Id: Id284ce281546b2b1b166f2b13d087bc6b114440e
Signed-off-by: Marc Jones <marc.jones(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/8257
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan(a)google.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/8257 for details.
-gerrit
Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8280
-gerrit
commit 7a9f71f29bc3ae1302923ac25591d1918a8288be
Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Date: Sun Jan 25 21:08:42 2015 -0600
include/types.h: Provide BIT() macro
This macro is controversial for arches where the bits are numbered
MSb first, though we don't support such an arch. We've seen this macro
creep into our tree in different places, so provide it in one place.
Change-Id: I86cd8a16420f34ef31b615aec4e0f7bd3191ca35
Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
---
src/include/types.h | 7 +++++++
src/soc/nvidia/tegra/dc.h | 1 -
src/soc/qualcomm/ipq806x/clock.c | 1 +
src/soc/qualcomm/ipq806x/include/clock.h | 1 -
4 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/include/types.h b/src/include/types.h
index ef5edc1..24ebfaf 100644
--- a/src/include/types.h
+++ b/src/include/types.h
@@ -22,6 +22,13 @@
#include <stdint.h>
#include <stddef.h>
+/*
+ * This may mean something else on architectures where the bits are numbered
+ * from the MSB (e.g. PowerPC), but until we cross that bridge, this macro is
+ * perfectly fine.
+ */
+#define BIT(x) (1ul << (x))
+
/**
* Coreboot error codes
*
diff --git a/src/soc/nvidia/tegra/dc.h b/src/soc/nvidia/tegra/dc.h
index c0b1986..ff36a0b 100644
--- a/src/soc/nvidia/tegra/dc.h
+++ b/src/soc/nvidia/tegra/dc.h
@@ -367,7 +367,6 @@ struct display_controller {
};
check_member(display_controller, winbuf, 0x800 * 4);
-#define BIT(pos) (1U << pos)
/* DC_CMD_DISPLAY_COMMAND 0x032 */
#define DISP_COMMAND_RAISE (1 << 0)
diff --git a/src/soc/qualcomm/ipq806x/clock.c b/src/soc/qualcomm/ipq806x/clock.c
index 88056d4..ee2ed64 100644
--- a/src/soc/qualcomm/ipq806x/clock.c
+++ b/src/soc/qualcomm/ipq806x/clock.c
@@ -3,6 +3,7 @@
*/
#include <delay.h>
+#include <types.h>
#include <clock.h>
/**
diff --git a/src/soc/qualcomm/ipq806x/include/clock.h b/src/soc/qualcomm/ipq806x/include/clock.h
index 98f6661..d9e7834 100644
--- a/src/soc/qualcomm/ipq806x/include/clock.h
+++ b/src/soc/qualcomm/ipq806x/include/clock.h
@@ -40,7 +40,6 @@
/* UART specific definitions */
-#define BIT(s) (1<<s)
#define Uart_ns_val NS(BIT_POS_31,BIT_POS_16,N_VALUE,M_VALUE, 5, 4, 3, 1, 2, 0,3)
#define Uart_clk_ns_mask (BM(BIT_POS_31, BIT_POS_16) | BM(BIT_POS_6, BIT_POS_0))
#define Uart_mnd_en_mask BIT(8) * !!(625)
Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8280
-gerrit
commit 7a4ffe0510100ce7f1fd3a7a50c0745538272151
Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Date: Sun Jan 25 21:08:42 2015 -0600
include/types.h: Provide BIT() macro
Change-Id: I86cd8a16420f34ef31b615aec4e0f7bd3191ca35
Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
---
src/include/types.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/src/include/types.h b/src/include/types.h
index ef5edc1..24ebfaf 100644
--- a/src/include/types.h
+++ b/src/include/types.h
@@ -22,6 +22,13 @@
#include <stdint.h>
#include <stddef.h>
+/*
+ * This may mean something else on architectures where the bits are numbered
+ * from the MSB (e.g. PowerPC), but until we cross that bridge, this macro is
+ * perfectly fine.
+ */
+#define BIT(x) (1ul << (x))
+
/**
* Coreboot error codes
*
Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8280
-gerrit
commit 2b5925820d33858b5d2ac80f412be0fcef7530c1
Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Date: Sun Jan 25 21:08:42 2015 -0600
include/types.h: Provide BIT() macro
Change-Id: I86cd8a16420f34ef31b615aec4e0f7bd3191ca35
Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
---
src/include/types.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/src/include/types.h b/src/include/types.h
index ef5edc1..efdb4a7 100644
--- a/src/include/types.h
+++ b/src/include/types.h
@@ -22,6 +22,13 @@
#include <stdint.h>
#include <stddef.h>
+/*
+ * This may mean something else on architectures where the bits are numbered
+ * from the MSB (e.g. PowerPC), but until we cross that bridge, this macro is
+ * perfectly fine.
+ */
+#define BIT(x) (1x << (nr))
+
/**
* Coreboot error codes
*