coreboot-gerrit January 2015

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Patch set updated for coreboot: d029609 CBMEM: Tag chipsets with LATE_CBMEM_INIT
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7850 -gerrit commit d029609ee94b2efc626629e913a1a5f0a1bcbe6a Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Dec 18 22:22:04 2014 +0200 CBMEM: Tag chipsets with LATE_CBMEM_INIT In preparation to remove the static CBMEM allocator, tag the chipsets that still do not implement get_top_of_ram() for romstage. LATE_CBMEM_INIT also implies BROKEN_CAR_MIGRATE. Change-Id: Iad359db2e65ac15c54ff6e9635429628e4db6fde Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 15 ++++++++------- src/arch/x86/boot/cbmem.c | 2 +- src/northbridge/amd/agesa/Kconfig | 1 + src/northbridge/amd/amdfam10/Kconfig | 1 + src/northbridge/amd/amdk8/Kconfig | 1 + src/northbridge/amd/gx2/Kconfig | 1 + src/northbridge/amd/lx/Kconfig | 1 + src/northbridge/amd/pi/Kconfig | 1 + src/northbridge/dmp/vortex86ex/Kconfig | 1 + src/northbridge/intel/e7501/Kconfig | 1 + src/northbridge/intel/e7505/Kconfig | 1 + src/northbridge/intel/i3100/Kconfig | 1 + src/northbridge/intel/i440bx/Kconfig | 1 + src/northbridge/intel/i440lx/Kconfig | 1 + src/northbridge/intel/i5000/Kconfig | 1 + src/northbridge/intel/i82810/Kconfig | 1 + src/northbridge/intel/i82830/Kconfig | 1 + src/northbridge/intel/i855/Kconfig | 1 + src/northbridge/intel/sch/Kconfig | 1 + src/northbridge/rdc/r8610/Kconfig | 1 + src/northbridge/via/cn700/Kconfig | 1 + src/northbridge/via/cx700/Kconfig | 1 + src/northbridge/via/vx800/Kconfig | 1 + src/northbridge/via/vx900/Kconfig | 1 + 24 files changed, 31 insertions(+), 8 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 4b10e17..92714d5 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -157,16 +157,17 @@ config INCLUDE_CONFIG_FILE (empty) 0x8e480 null 3610440 config EARLY_CBMEM_INIT - bool - default n + def_bool !LATE_CBMEM_INIT + +config LATE_CBMEM_INIT + def_bool n help - Make coreboot initialize the CBMEM structures while running in ROM - stage. This is useful when the ROM stage wants to communicate - some, for instance, execution timestamps. It needs support in - romstage.c and should be enabled by the board's Kconfig. + Enable this in chipset's Kconfig if northbridge does not implement + early get_top_of_ram() call for romstage. CBMEM tables will be + allocated late in ramstage, after PCI devices resources are known. config BROKEN_CAR_MIGRATE - def_bool !EARLY_CBMEM_INIT + def_bool LATE_CBMEM_INIT help Many boards use CAR_GLOBAL but have no EARLY_CBMEM_INIT and manage CAR migration on S3 resume path only. Couple boards use diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index 34309c2..af42edd 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -56,7 +56,7 @@ void set_top_of_ram(uint64_t ramtop) } #endif /* !__PRE_RAM__ */ -#if CONFIG_BROKEN_CAR_MIGRATE || !defined(__PRE_RAM__) +#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) unsigned long __attribute__((weak)) get_top_of_ram(void) { printk(BIOS_WARNING, "WARNING: you need to define get_top_of_ram() for your chipset\n"); diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig index 68551fb..8fd8bfd 100644 --- a/src/northbridge/amd/agesa/Kconfig +++ b/src/northbridge/amd/agesa/Kconfig @@ -20,6 +20,7 @@ config NORTHBRIDGE_AMD_AGESA bool default CPU_AMD_AGESA + select LATE_CBMEM_INIT if NORTHBRIDGE_AMD_AGESA diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 0789ac3..13b912e 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -25,6 +25,7 @@ config NORTHBRIDGE_AMD_AMDFAM10 select HYPERTRANSPORT_PLUGIN_SUPPORT select MMCONF_SUPPORT select PER_DEVICE_ACPI_TABLES + select LATE_CBMEM_INIT if NORTHBRIDGE_AMD_AMDFAM10 config AGP_APERTURE_SIZE diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 8bee5ca..65dc173 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -24,6 +24,7 @@ config NORTHBRIDGE_AMD_AMDK8 select HAVE_DEBUG_CAR select HYPERTRANSPORT_PLUGIN_SUPPORT select PER_DEVICE_ACPI_TABLES + select LATE_CBMEM_INIT if NORTHBRIDGE_AMD_AMDK8 config AGP_APERTURE_SIZE diff --git a/src/northbridge/amd/gx2/Kconfig b/src/northbridge/amd/gx2/Kconfig index dc347c4..1fe33f8 100644 --- a/src/northbridge/amd/gx2/Kconfig +++ b/src/northbridge/amd/gx2/Kconfig @@ -20,6 +20,7 @@ config NORTHBRIDGE_AMD_GX2 bool select GEODE_VSA + select LATE_CBMEM_INIT if NORTHBRIDGE_AMD_GX2 diff --git a/src/northbridge/amd/lx/Kconfig b/src/northbridge/amd/lx/Kconfig index d74d715..abc3e4c 100644 --- a/src/northbridge/amd/lx/Kconfig +++ b/src/northbridge/amd/lx/Kconfig @@ -1,6 +1,7 @@ config NORTHBRIDGE_AMD_LX bool select GEODE_VSA + select LATE_CBMEM_INIT if NORTHBRIDGE_AMD_LX diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig index 8af4872..2b8e356 100644 --- a/src/northbridge/amd/pi/Kconfig +++ b/src/northbridge/amd/pi/Kconfig @@ -20,6 +20,7 @@ config NORTHBRIDGE_AMD_PI bool default CPU_AMD_PI + select LATE_CBMEM_INIT if NORTHBRIDGE_AMD_PI diff --git a/src/northbridge/dmp/vortex86ex/Kconfig b/src/northbridge/dmp/vortex86ex/Kconfig index 7bf5235..74239ad 100644 --- a/src/northbridge/dmp/vortex86ex/Kconfig +++ b/src/northbridge/dmp/vortex86ex/Kconfig @@ -19,3 +19,4 @@ config NORTHBRIDGE_DMP_VORTEX86EX bool + select LATE_CBMEM_INIT diff --git a/src/northbridge/intel/e7501/Kconfig b/src/northbridge/intel/e7501/Kconfig index 88c0b45..763b96e 100644 --- a/src/northbridge/intel/e7501/Kconfig +++ b/src/northbridge/intel/e7501/Kconfig @@ -2,4 +2,5 @@ config NORTHBRIDGE_INTEL_E7501 bool select HAVE_DEBUG_RAM_SETUP select PER_DEVICE_ACPI_TABLES + select LATE_CBMEM_INIT diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig index ff7f5a5..e755852 100644 --- a/src/northbridge/intel/e7505/Kconfig +++ b/src/northbridge/intel/e7505/Kconfig @@ -26,6 +26,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy def_bool y select HAVE_DEBUG_RAM_SETUP select PER_DEVICE_ACPI_TABLES + select LATE_CBMEM_INIT config HW_SCRUBBER bool diff --git a/src/northbridge/intel/i3100/Kconfig b/src/northbridge/intel/i3100/Kconfig index 079004b..cb0bd38 100644 --- a/src/northbridge/intel/i3100/Kconfig +++ b/src/northbridge/intel/i3100/Kconfig @@ -1,5 +1,6 @@ config NORTHBRIDGE_INTEL_I3100 bool + select LATE_CBMEM_INIT if NORTHBRIDGE_INTEL_I3100 config DIMM_MAP_LOGICAL diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig index 902eb73..c5cc43e 100644 --- a/src/northbridge/intel/i440bx/Kconfig +++ b/src/northbridge/intel/i440bx/Kconfig @@ -20,6 +20,7 @@ config NORTHBRIDGE_INTEL_I440BX bool select HAVE_DEBUG_RAM_SETUP + select LATE_CBMEM_INIT config SDRAMPWR_4DIMM bool diff --git a/src/northbridge/intel/i440lx/Kconfig b/src/northbridge/intel/i440lx/Kconfig index a88a7a1..1ccaac6 100644 --- a/src/northbridge/intel/i440lx/Kconfig +++ b/src/northbridge/intel/i440lx/Kconfig @@ -20,4 +20,5 @@ config NORTHBRIDGE_INTEL_I440LX bool select HAVE_DEBUG_RAM_SETUP + select LATE_CBMEM_INIT diff --git a/src/northbridge/intel/i5000/Kconfig b/src/northbridge/intel/i5000/Kconfig index f7344ca..3bd685a 100644 --- a/src/northbridge/intel/i5000/Kconfig +++ b/src/northbridge/intel/i5000/Kconfig @@ -22,6 +22,7 @@ config NORTHBRIDGE_INTEL_I5000 select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT select HAVE_DEBUG_RAM_SETUP + select LATE_CBMEM_INIT if NORTHBRIDGE_INTEL_I5000 diff --git a/src/northbridge/intel/i82810/Kconfig b/src/northbridge/intel/i82810/Kconfig index 79fe36a..723f751 100644 --- a/src/northbridge/intel/i82810/Kconfig +++ b/src/northbridge/intel/i82810/Kconfig @@ -20,6 +20,7 @@ config NORTHBRIDGE_INTEL_I82810 bool select HAVE_DEBUG_RAM_SETUP + select LATE_CBMEM_INIT choice prompt "Onboard graphics" diff --git a/src/northbridge/intel/i82830/Kconfig b/src/northbridge/intel/i82830/Kconfig index 20b31a2..662840f 100644 --- a/src/northbridge/intel/i82830/Kconfig +++ b/src/northbridge/intel/i82830/Kconfig @@ -1,6 +1,7 @@ config NORTHBRIDGE_INTEL_I82830 bool select HAVE_DEBUG_RAM_SETUP + select LATE_CBMEM_INIT choice prompt "Onboard graphics" diff --git a/src/northbridge/intel/i855/Kconfig b/src/northbridge/intel/i855/Kconfig index f5c2890..44becf6 100644 --- a/src/northbridge/intel/i855/Kconfig +++ b/src/northbridge/intel/i855/Kconfig @@ -1,6 +1,7 @@ config NORTHBRIDGE_INTEL_I855 bool select HAVE_DEBUG_RAM_SETUP + select LATE_CBMEM_INIT choice prompt "Onboard graphics" diff --git a/src/northbridge/intel/sch/Kconfig b/src/northbridge/intel/sch/Kconfig index b8dad72..f495e6a 100644 --- a/src/northbridge/intel/sch/Kconfig +++ b/src/northbridge/intel/sch/Kconfig @@ -21,6 +21,7 @@ config NORTHBRIDGE_INTEL_SCH bool select MMCONF_SUPPORT select PER_DEVICE_ACPI_TABLES + select LATE_CBMEM_INIT if NORTHBRIDGE_INTEL_SCH diff --git a/src/northbridge/rdc/r8610/Kconfig b/src/northbridge/rdc/r8610/Kconfig index 85461b7..e93a3e6 100644 --- a/src/northbridge/rdc/r8610/Kconfig +++ b/src/northbridge/rdc/r8610/Kconfig @@ -1,2 +1,3 @@ config NORTHBRIDGE_RDC_R8610 bool + select LATE_CBMEM_INIT diff --git a/src/northbridge/via/cn700/Kconfig b/src/northbridge/via/cn700/Kconfig index 34c330e..15c86eb 100644 --- a/src/northbridge/via/cn700/Kconfig +++ b/src/northbridge/via/cn700/Kconfig @@ -1,6 +1,7 @@ config NORTHBRIDGE_VIA_CN700 bool select HAVE_DEBUG_RAM_SETUP + select LATE_CBMEM_INIT # TODO: Values are from the CX700 datasheet, not sure if this matches CN700. # TODO: What should be the per-chipset default value here? diff --git a/src/northbridge/via/cx700/Kconfig b/src/northbridge/via/cx700/Kconfig index 8f6e337..03014eb 100644 --- a/src/northbridge/via/cx700/Kconfig +++ b/src/northbridge/via/cx700/Kconfig @@ -5,6 +5,7 @@ config NORTHBRIDGE_VIA_CX700 select HAVE_HARD_RESET select IOAPIC select SMP + select LATE_CBMEM_INIT # TODO: What should be the per-chipset default value here? choice diff --git a/src/northbridge/via/vx800/Kconfig b/src/northbridge/via/vx800/Kconfig index 48ea456..a59fc41 100644 --- a/src/northbridge/via/vx800/Kconfig +++ b/src/northbridge/via/vx800/Kconfig @@ -2,4 +2,5 @@ config NORTHBRIDGE_VIA_VX800 bool select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_SMBUS + select LATE_CBMEM_INIT diff --git a/src/northbridge/via/vx900/Kconfig b/src/northbridge/via/vx900/Kconfig index 9fe5909..617074f 100644 --- a/src/northbridge/via/vx900/Kconfig +++ b/src/northbridge/via/vx900/Kconfig @@ -26,6 +26,7 @@ config NORTHBRIDGE_VIA_VX900 select HAVE_HARD_RESET select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT + select LATE_CBMEM_INIT if NORTHBRIDGE_VIA_VX900

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Patch set updated for coreboot: 7d0c589 cbmem: [NOTFORMERGE] CBMEM_INIT_HOOK() API
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7878 -gerrit commit 7d0c589302a172d68116421ff268699e6e88bdff Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Jan 7 04:48:43 2015 +0200 cbmem: [NOTFORMERGE] CBMEM_INIT_HOOK() API Squashed two changes from chromium.git. cbmem: Unify random on-CBMEM-init tasks under common CBMEM_INIT_HOOK() API There are several use cases for performing a certain task when CBMEM is first set up (usually to migrate some data into it that was previously kept in BSS/SRAM/hammerspace), and unfortunately we handle each of them differently: timestamp migration is called explicitly from cbmem_initialize(), certain x86-chipset-specific tasks use the CAR_MIGRATION() macro to register a hook, and the CBMEM console is migrated through a direct call from romstage (on non-x86 and SandyBridge boards). This patch decouples the CAR_MIGRATION() hook mechanism from cache-as-RAM and rechristens it to CBMEM_INIT_HOOK(), which is a clearer description of what it really does. All of the above use cases are ported to this new, consistent model, allowing us to have one less line of boilerplate in non-CAR romstages. BRANCH=None BUG=None TEST=Built and booted on Nyan_Blaze and Falco with and without CONFIG_CBMEM_CONSOLE. Confirmed that 'cbmem -c' shows the full log after boot (and the resume log after S3 resume on Falco). Compiled for Parrot, Stout and Lumpy. Original-Change-Id: I1681b372664f5a1f15c3733cbd32b9b11f55f8ea Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/232612 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> cbmem: Extend hooks to ramstage, fix timestamp synching Commit 7dd5bbd71 (cbmem: Unify random on-CBMEM-init tasks under common CBMEM_INIT_HOOK() API) inadvertently broke ramstage timestamps since timestamp_sync() was no longer called there. Oops. This patch fixes the issue by extending the CBMEM_INIT_HOOK() mechanism to the cbmem_initialize() call in ramstage. The macro is split into explicit ROMSTAGE_/RAMSTAGE_ versions to make the behavior as clear as possible and prevent surprises (although just using a single macro and relying on the Makefiles to link an object into all appropriate stages would also work). This allows us to get rid of the explicit cbmemc_reinit() in ramstage (which I somehow accounted for in the last patch without realizing that timestamps work exactly the same way...), and replace the older and less flexible cbmem_arch_init() mechanism. Also added a size assertion for the pre-RAM CBMEM console to memlayout that could prevent a very unlikely buffer overflow I just noticed. BRANCH=None BUG=None TEST=Booted on Pinky and Falco, confirmed that ramstage timestamps once again show up. Compile-tested for Rambi and Samus. Original-Change-Id: If907266c3f20dc3d599b5c968ea5b39fe5c00e9c Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/233533 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Change-Id: I1be89bafacfe85cba63426e2d91f5d8d4caa1800 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/arm/include/arch/early_variables.h | 1 - src/arch/arm64/include/arch/early_variables.h | 1 - src/arch/x86/boot/cbmem.c | 22 ----- src/arch/x86/boot/gdt.c | 3 +- src/arch/x86/include/arch/early_variables.h | 14 --- src/arch/x86/init/romstage.ld | 9 +- src/cpu/x86/car.c | 21 +---- src/drivers/usb/ehci_debug.c | 2 +- src/include/cbmem.h | 20 ++++- src/include/cpu/x86/gdt.h | 3 - src/include/timestamp.h | 2 - src/lib/cbmem_common.c | 20 ++--- src/lib/cbmem_console.c | 6 +- src/lib/ramstage.ld | 117 +++++++++++++++++++++++++ src/lib/rmodule.ld | 3 + src/lib/romstage.ld | 62 +++++++++++++ src/lib/timestamp.c | 7 +- src/soc/intel/baytrail/romstage/romstage.c | 2 +- src/soc/intel/broadwell/romstage/power_state.c | 2 +- 19 files changed, 226 insertions(+), 91 deletions(-) diff --git a/src/arch/arm/include/arch/early_variables.h b/src/arch/arm/include/arch/early_variables.h index 97bc0cd..f7266d4 100644 --- a/src/arch/arm/include/arch/early_variables.h +++ b/src/arch/arm/include/arch/early_variables.h @@ -22,7 +22,6 @@ #define CAR_GLOBAL -#define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) diff --git a/src/arch/arm64/include/arch/early_variables.h b/src/arch/arm64/include/arch/early_variables.h index 97bc0cd..f7266d4 100644 --- a/src/arch/arm64/include/arch/early_variables.h +++ b/src/arch/arm64/include/arch/early_variables.h @@ -22,7 +22,6 @@ #define CAR_GLOBAL -#define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index 762d246..414782a 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -20,12 +20,6 @@ #include <cbmem.h> #include <arch/acpi.h> -/* FIXME: Remove after CBMEM_INIT_HOOKS. */ -#include <arch/early_variables.h> -#include <cpu/x86/gdt.h> -#include <console/cbmem_console.h> -#include <timestamp.h> - #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) #if !defined(__PRE_RAM__) @@ -55,22 +49,6 @@ void *cbmem_top(void) #endif /* LATE_CBMEM_INIT */ -void cbmem_run_init_hooks(void) -{ - /* Migrate car.global_data. */ - car_migrate_variables(); - -#if !defined(__PRE_RAM__) - /* Relocate CBMEM console. */ - cbmemc_reinit(); - - /* Relocate timestamps stash. */ - timestamp_reinit(); - - move_gdt(); -#endif -} - /* Something went wrong, our high memory area got wiped */ void cbmem_fail_resume(void) { diff --git a/src/arch/x86/boot/gdt.c b/src/arch/x86/boot/gdt.c index 7b64af7..b4cfbee 100644 --- a/src/arch/x86/boot/gdt.c +++ b/src/arch/x86/boot/gdt.c @@ -32,7 +32,7 @@ struct gdtarg { /* Copy GDT to new location and reload it. * FIXME: We only do this for BSP CPU. */ -void move_gdt(void) +static void move_gdt(void) { void *newgdt; u16 num_gdt_bytes = (u32)&gdt_end - (u32)&gdt; @@ -55,3 +55,4 @@ void move_gdt(void) __asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg)); printk(BIOS_DEBUG, "ok\n"); } +RAMSTAGE_CBMEM_INIT_HOOK(move_gdt) diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h index 2d5ae85..0f3c4f8 100644 --- a/src/arch/x86/include/arch/early_variables.h +++ b/src/arch/x86/include/arch/early_variables.h @@ -29,12 +29,6 @@ asm(".previous"); #endif #if defined(__PRE_RAM__) -#define CAR_MIGRATE_ATTR __attribute__ ((used,section (".car.migrate"))) - -/* Call migrate_fn_() when CAR globals are migrated. */ -#define CAR_MIGRATE(migrate_fn_) \ - static void (* const migrate_fn_ ## _ptr)(void) CAR_MIGRATE_ATTR = \ - migrate_fn_; /* Get the correct pointer for the CAR global variable. */ void *car_get_var_ptr(void *var); @@ -51,18 +45,10 @@ void *car_sync_var_ptr(void *var); do { car_get_var(var) = (val); } while(0) #else -#define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) #endif -#if defined(__PRE_RAM__) && IS_ENABLED(CONFIG_CACHE_AS_RAM) -/* Migrate the CAR variables to memory. */ -void car_migrate_variables(void); -#else -static inline void car_migrate_variables(void) { } -#endif - #endif diff --git a/src/arch/x86/init/romstage.ld b/src/arch/x86/init/romstage.ld index 99bcc8e..3ade87f 100644 --- a/src/arch/x86/init/romstage.ld +++ b/src/arch/x86/init/romstage.ld @@ -31,15 +31,14 @@ SECTIONS _rom = .; *(.rom.text); *(.rom.data); + . = ALIGN(4); + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; *(.rodata); *(.rodata.*); *(.rom.data.*); . = ALIGN(16); - _car_migrate_start = .; - *(.car.migrate); - LONG(0); - _car_migrate_end = .; - . = ALIGN(16); _erom = .; } diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c index da351c5..1c43c25 100644 --- a/src/cpu/x86/car.c +++ b/src/cpu/x86/car.c @@ -23,10 +23,6 @@ #include <cbmem.h> #include <arch/early_variables.h> -typedef void (* const car_migration_func_t)(void); - -extern car_migration_func_t _car_migrate_start; - extern char _car_data_start[]; extern char _car_data_end[]; @@ -155,22 +151,9 @@ static void do_car_migrate_variables(void) car_migrated = ~0; } -static void do_car_migrate_hooks(void) -{ - car_migration_func_t *migrate_func; - /* Call all the migration functions. */ - migrate_func = &_car_migrate_start; - while (*migrate_func != NULL) { - (*migrate_func)(); - migrate_func++; - } -} - -void car_migrate_variables(void) +static void car_migrate_variables(void) { if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE)) do_car_migrate_variables(); - - if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE)) - do_car_migrate_hooks(); } +ROMSTAGE_CBMEM_INIT_HOOK(car_migrate_variables) diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index 83c23a3..f89ea2f 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -683,7 +683,7 @@ static void migrate_ehci_debug(void) memcpy(dbg_info_cbmem, dbg_info, sizeof(*dbg_info)); car_set_var(glob_dbg_info_p, dbg_info_cbmem); } -CAR_MIGRATE(migrate_ehci_debug); +ROMSTAGE_CBMEM_INIT_HOOK(migrate_ehci_debug); #endif int dbgp_ep_is_active(struct dbgp_pipe *pipe) diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 2f86b85..40aed36 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -180,16 +180,32 @@ void *cbmem_add(u32 id, u64 size); /* Find a cbmem entry of a given id. These return NULL on failure. */ void *cbmem_find(u32 id); -void cbmem_run_init_hooks(void); void cbmem_fail_resume(void); +typedef void (* const cbmem_init_hook_t)(void); +void cbmem_run_init_hooks(void); + #ifndef __PRE_RAM__ /* Ramstage only functions. */ /* Add the cbmem memory used to the memory map at boot. */ void cbmem_add_bootmem(void); void cbmem_list(void); void cbmem_print_entry(int n, u32 id, u64 start, u64 size); -#endif /* __PRE_RAM__ */ +#endif + +#ifndef __PRE_RAM__ +#define ROMSTAGE_CBMEM_INIT_HOOK(init_fn_) static cbmem_init_hook_t \ + init_fn_ ## _unused_ __attribute__((unused)) = init_fn_; +#define RAMSTAGE_CBMEM_INIT_HOOK(init_fn_) \ + static cbmem_init_hook_t init_fn_ ## _ptr_ __attribute__((used, \ + section(".rodata.cbmem_init_hooks"))) = init_fn_; +#else /* __PRE_RAM__ */ +#define ROMSTAGE_CBMEM_INIT_HOOK(init_fn_) \ + static cbmem_init_hook_t init_fn_ ## _ptr_ __attribute__((used, \ + section(".rodata.cbmem_init_hooks"))) = init_fn_; +#define RAMSTAGE_CBMEM_INIT_HOOK(init_fn_) static cbmem_init_hook_t \ + init_fn_ ## _unused_ __attribute__((unused)) = init_fn_; +#endif /* !__PRE_RAM__ */ /* These are for compatibility with old boards only. Any new chipset and board * must implement cbmem_top() for both romstage and ramstage to support diff --git a/src/include/cpu/x86/gdt.h b/src/include/cpu/x86/gdt.h index 260b158..43a80fe 100644 --- a/src/include/cpu/x86/gdt.h +++ b/src/include/cpu/x86/gdt.h @@ -28,7 +28,4 @@ extern char _secondary_gdt_addr[]; extern char _secondary_start[]; extern char _secondary_start_end[]; -/* Defined in src/arch/x86/boot/gdt.c */ -void move_gdt(void); - #endif /* CPU_X86_GDT */ diff --git a/src/include/timestamp.h b/src/include/timestamp.h index ba73135..2be3217 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -64,12 +64,10 @@ enum timestamp_id { void timestamp_init(uint64_t base); void timestamp_add(enum timestamp_id id, uint64_t ts_time); void timestamp_add_now(enum timestamp_id id); -void timestamp_reinit(void); #else #define timestamp_init(base) #define timestamp_add(id, time) #define timestamp_add_now(id) -#define timestamp_reinit() #endif /* Implemented by the architecture code */ diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c index 33f16b5..6509c3f 100644 --- a/src/lib/cbmem_common.c +++ b/src/lib/cbmem_common.c @@ -20,10 +20,6 @@ #include <cbmem.h> #include <stdlib.h> -/* FIXME: Remove after CBMEM_INIT_HOOKS. */ -#include <console/cbmem_console.h> -#include <timestamp.h> - #ifndef __PRE_RAM__ static const struct cbmem_id_to_name cbmem_ids[] = { CBMEM_ID_TO_NAME_TABLE }; @@ -52,18 +48,18 @@ void cbmem_print_entry(int n, u32 id, u64 base, u64 size) #endif /* !__PRE_RAM__ */ -/* FIXME: Replace with CBMEM_INIT_HOOKS API. */ -#if !IS_ENABLED(CONFIG_ARCH_X86) +extern cbmem_init_hook_t _cbmem_init_hooks; +extern cbmem_init_hook_t _ecbmem_init_hooks; + void cbmem_run_init_hooks(void) { - /* Relocate CBMEM console. */ - cbmemc_reinit(); - - /* Relocate timestamps stash. */ - timestamp_reinit(); + cbmem_init_hook_t *init_hook_ptr = &_cbmem_init_hooks; + while (init_hook_ptr != &_ecbmem_init_hooks) { + (*init_hook_ptr)(); + init_hook_ptr++; + } } void __attribute__((weak)) cbmem_fail_resume(void) { } -#endif diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 0c2722c..7f13292 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -208,7 +208,7 @@ static void copy_console_buffer(struct cbmem_console *old_cons_p, new_cons_p->buffer_cursor = cursor; } -void cbmemc_reinit(void) +static void cbmemc_reinit(void) { struct cbmem_console *cbm_cons_p = NULL; int flags = CBMEMC_APPEND; @@ -227,5 +227,5 @@ void cbmemc_reinit(void) init_console_ptr(cbm_cons_p, CONFIG_CONSOLE_CBMEM_BUFFER_SIZE, flags); } -/* Call cbmemc_reinit() at CAR migration time. */ -CAR_MIGRATE(cbmemc_reinit) +ROMSTAGE_CBMEM_INIT_HOOK(cbmemc_reinit) +RAMSTAGE_CBMEM_INIT_HOOK(cbmemc_reinit) diff --git a/src/lib/ramstage.ld b/src/lib/ramstage.ld new file mode 100644 index 0000000..732c8e9 --- /dev/null +++ b/src/lib/ramstage.ld @@ -0,0 +1,117 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This file is included inside a SECTIONS block */ + +/* First we place the code and read only data (typically const declared). + * This could theoretically be placed in rom. + */ +.text : { + _program = .; + _ramstage = .; + _text = .; + *(.text._start); + *(.text.stage_entry); + *(.text); + *(.text.*); + . = ALIGN(16); + _etext = .; +} : to_load + +#ifdef CONFIG_COVERAGE +.ctors : { + . = ALIGN(0x100); + __CTOR_LIST__ = .; + KEEP(*(.ctors)); + LONG(0); + LONG(0); + __CTOR_END__ = .; +} +#endif + +/* TODO: align data sections to cache lines? (is that really useful?) */ +.rodata : { + _rodata = .; + . = ALIGN(8); + + /* If any changes are made to the driver start/symbols or the + * section names the equivalent changes need to made to + * rmodule.ld. */ + console_drivers = .; + KEEP(*(.rodata.console_drivers)); + econsole_drivers = . ; + . = ALIGN(8); + pci_drivers = . ; + KEEP(*(.rodata.pci_driver)); + epci_drivers = . ; + cpu_drivers = . ; + KEEP(*(.rodata.cpu_driver)); + ecpu_drivers = . ; + _bs_init_begin = .; + KEEP(*(.bs_init)); + _bs_init_end = .; + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; + + *(.rodata) + *(.rodata.*) + /* kevinh/Ispiri - Added an align, because the objcopy tool + * incorrectly converts sections that are not long word aligned. + */ + . = ALIGN(8); + + _erodata = .; +} + +.data : { + /* Move to different cache line to avoid false sharing with .rodata. */ + . = ALIGN(64); /* May not be actual line size, not that important. */ + _data = .; + *(.data) + *(.data.*) + _edata = .; +} + +.bss . : { + _bss = .; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + _ebss = .; +} + +.heap . : { + _heap = .; + /* Reserve CONFIG_HEAP_SIZE bytes for the heap */ + . += CONFIG_HEAP_SIZE ; + . = ALIGN(4); + _eheap = .; + _eramstage = .; + _eprogram = .; +} + +/* Discard the sections we don't need/want */ + +/DISCARD/ : { + *(.comment) + *(.note) + *(.note.*) +} diff --git a/src/lib/rmodule.ld b/src/lib/rmodule.ld index f3e7cba..ad2c852 100644 --- a/src/lib/rmodule.ld +++ b/src/lib/rmodule.ld @@ -48,6 +48,9 @@ SECTIONS _bs_init_begin = .; *(.bs_init) _bs_init_end = .; + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; . = ALIGN(8); diff --git a/src/lib/romstage.ld b/src/lib/romstage.ld new file mode 100644 index 0000000..bbad333 --- /dev/null +++ b/src/lib/romstage.ld @@ -0,0 +1,62 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This file is included inside a SECTIONS block */ + +.text . : { + _program = .; + _romstage = .; + *(.text._start); + *(.text.stage_entry); + *(.text); + *(.text.*); +} : to_load + +.data . : { + . = ALIGN(8); + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; + *(.rodata); + *(.rodata.*); + *(.data); + *(.data.*); + . = ALIGN(8); +} + +.bss . : { + . = ALIGN(8); + _bss = .; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + _ebss = .; + _eromstage = .; + _eprogram = .; +} + +/* Discard the sections we don't need/want */ +/DISCARD/ : { + *(.comment) + *(.note) + *(.comment.*) + *(.note.*) + *(.eh_frame); +} diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 67635f8..f94aaf7 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -143,7 +143,7 @@ void timestamp_init(uint64_t base) #endif } -void timestamp_reinit(void) +static void timestamp_reinit(void) { if (!boot_cpu()) return; @@ -158,5 +158,6 @@ void timestamp_reinit(void) timestamp_do_sync(); } -/* Call timestamp_reinit at CAR migration time. */ -CAR_MIGRATE(timestamp_reinit) +/* Call timestamp_reinit CBMEM init hooks. */ +ROMSTAGE_CBMEM_INIT_HOOK(timestamp_reinit) +RAMSTAGE_CBMEM_INIT_HOOK(timestamp_reinit) diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index a989a99..1a610cf 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -157,7 +157,7 @@ static void migrate_power_state(void) } memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem)); } -CAR_MIGRATE(migrate_power_state); +ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) static struct chipset_power_state *fill_power_state(void) { diff --git a/src/soc/intel/broadwell/romstage/power_state.c b/src/soc/intel/broadwell/romstage/power_state.c index 6e333c1..5871ad9 100644 --- a/src/soc/intel/broadwell/romstage/power_state.c +++ b/src/soc/intel/broadwell/romstage/power_state.c @@ -50,7 +50,7 @@ static void migrate_power_state(void) } memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem)); } -CAR_MIGRATE(migrate_power_state); +ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) /* Return 0, 3, or 5 to indicate the previous sleep state. */ static int prev_sleep_state(struct chipset_power_state *ps)

1 0

Patch set updated for coreboot: 6bc7c05 CBMEM: Implement cbmem_run_init_hooks() stub
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7876 -gerrit commit 6bc7c0509096e73e32fb644e538e72ad04ba1fbf Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Dec 18 18:30:29 2014 +0200 CBMEM: Implement cbmem_run_init_hooks() stub Until we completely can unify early_variables, use these to handle CBMEM update hooks for both romstage and ramstage. For x86, CAR_MIGRATE serves the purpose of romstage hooks. Change-Id: I100ebc0e35e1b7091b4f287ca37f539fd7c9fa7a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/arm/tables.c | 8 -------- src/arch/arm64/tables.c | 8 -------- src/arch/riscv/tables.c | 8 -------- src/arch/x86/boot/cbmem.c | 18 ++++++++++++------ src/arch/x86/boot/tables.c | 8 -------- src/include/cbmem.h | 8 +++----- src/lib/cbmem.c | 2 +- src/lib/cbmem_common.c | 11 +++++++++++ src/lib/dynamic_cbmem.c | 4 ++-- 9 files changed, 29 insertions(+), 46 deletions(-) diff --git a/src/arch/arm/tables.c b/src/arch/arm/tables.c index a2b7b9b..09385b6 100644 --- a/src/arch/arm/tables.c +++ b/src/arch/arm/tables.c @@ -29,14 +29,6 @@ #define MAX_COREBOOT_TABLE_SIZE (8 * 1024) -void cbmem_arch_init(void) -{ -} - -void cbmem_fail_resume(void) -{ -} - void write_tables(void) { unsigned long table_pointer, new_table_pointer; diff --git a/src/arch/arm64/tables.c b/src/arch/arm64/tables.c index a2b7b9b..09385b6 100644 --- a/src/arch/arm64/tables.c +++ b/src/arch/arm64/tables.c @@ -29,14 +29,6 @@ #define MAX_COREBOOT_TABLE_SIZE (8 * 1024) -void cbmem_arch_init(void) -{ -} - -void cbmem_fail_resume(void) -{ -} - void write_tables(void) { unsigned long table_pointer, new_table_pointer; diff --git a/src/arch/riscv/tables.c b/src/arch/riscv/tables.c index 6300f7b..124a659 100644 --- a/src/arch/riscv/tables.c +++ b/src/arch/riscv/tables.c @@ -29,10 +29,6 @@ #define MAX_COREBOOT_TABLE_SIZE (8 * 1024) -void cbmem_arch_init(void) -{ -} - // WTF. this does not agre with the prototype! static struct lb_memory *wtf_write_tables(void) { @@ -70,7 +66,3 @@ void write_tables(void) { wtf_write_tables(); } - -void cbmem_fail_resume(void) -{ -} diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index 8b2b6da..bbf70a2 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -20,6 +20,9 @@ #include <cbmem.h> #include <arch/acpi.h> +/* FIXME: Remove after CBMEM_INIT_HOOKS. */ +#include <cpu/x86/gdt.h> + #if !CONFIG_DYNAMIC_CBMEM void get_cbmem_table(uint64_t *base, uint64_t *size) { @@ -69,16 +72,19 @@ void *cbmem_top(void) #endif /* DYNAMIC_CBMEM */ +void cbmem_run_init_hooks(void) +{ #if !defined(__PRE_RAM__) + move_gdt(); +#endif +} -/* ACPI resume needs to be cleared in the fail-to-recover case, but that - * condition is only handled during ramstage. */ +/* Something went wrong, our high memory area got wiped */ void cbmem_fail_resume(void) { -#if CONFIG_HAVE_ACPI_RESUME - /* Something went wrong, our high memory area got wiped */ +#if !defined(__PRE_RAM__) && IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) + /* ACPI resume needs to be cleared in the fail-to-recover case, but that + * condition is only handled during ramstage. */ acpi_fail_wakeup(); #endif } - -#endif /* !__PRE_RAM__ */ diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c index 8685ed4..c2265ea 100644 --- a/src/arch/x86/boot/tables.c +++ b/src/arch/x86/boot/tables.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <cpu/cpu.h> -#include <cpu/x86/gdt.h> #include <boot/tables.h> #include <boot/coreboot_tables.h> #include <arch/pirq_routing.h> @@ -31,13 +30,6 @@ #include <cbmem.h> #include <smbios.h> - -void cbmem_arch_init(void) -{ - /* defined in gdt.c */ - move_gdt(); -} - void write_tables(void) { unsigned long low_table_start, low_table_end; diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 7de6e56..88d2bfe 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -213,17 +213,15 @@ void *cbmem_add(u32 id, u64 size); /* Find a cbmem entry of a given id. These return NULL on failure. */ void *cbmem_find(u32 id); +void cbmem_run_init_hooks(void); +void cbmem_fail_resume(void); + #ifndef __PRE_RAM__ /* Ramstage only functions. */ /* Add the cbmem memory used to the memory map at boot. */ void cbmem_add_bootmem(void); void cbmem_list(void); -void cbmem_arch_init(void); void cbmem_print_entry(int n, u32 id, u64 start, u64 size); -void cbmem_fail_resume(void); -#else -static inline void cbmem_arch_init(void) {} -static inline void cbmem_fail_resume(void) {} #endif /* __PRE_RAM__ */ #endif /* __ASSEMBLER__ */ diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index 0b24ad2..5f834b7 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -243,7 +243,7 @@ int cbmem_recovery(int is_wakeup) cbmem_fail_resume(); } - cbmem_arch_init(); + cbmem_run_init_hooks(); car_migrate_variables(); return !found; } diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c index a800173..438fd7f 100644 --- a/src/lib/cbmem_common.c +++ b/src/lib/cbmem_common.c @@ -47,3 +47,14 @@ void cbmem_print_entry(int n, u32 id, u64 base, u64 size) } #endif /* !__PRE_RAM__ */ + +/* FIXME: Replace with CBMEM_INIT_HOOKS API. */ +#if !IS_ENABLED(CONFIG_ARCH_X86) +void cbmem_run_init_hooks(void) +{ +} + +void __attribute__((weak)) cbmem_fail_resume(void) +{ +} +#endif diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c index 5eddbca..ce4e625 100644 --- a/src/lib/dynamic_cbmem.c +++ b/src/lib/dynamic_cbmem.c @@ -171,7 +171,7 @@ void cbmem_initialize_empty(void) printk(BIOS_DEBUG, "CBMEM: root @ %p %d entries.\n", root, root->max_entries); - cbmem_arch_init(); + cbmem_run_init_hooks(); /* Migrate cache-as-ram variables. */ car_migrate_variables(); @@ -249,7 +249,7 @@ int cbmem_initialize(void) root->locked = 1; #endif - cbmem_arch_init(); + cbmem_run_init_hooks(); /* Migrate cache-as-ram variables. */ car_migrate_variables();

1 0

Patch set updated for coreboot: 036cc74 Intel FSP platforms: Fix timestamps
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8024 -gerrit commit 036cc74d5abe8d81abccc8854ae8d8983b52ebea Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Dec 31 21:48:48 2014 +0200 Intel FSP platforms: Fix timestamps Now that BROKEN_CAR_MIGRATE is fixed we can stash these in CAR. Change-Id: I49c31b91f34d415778797d08a347a51dbef797e3 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/mainboard/intel/cougar_canyon2/romstage.c | 23 ++++------------------- src/soc/intel/fsp_baytrail/romstage/romstage.c | 11 ++++++----- src/southbridge/intel/fsp_rangeley/romstage.c | 11 ++++++----- 3 files changed, 16 insertions(+), 29 deletions(-) diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c index e836bfa..c6a58ab 100644 --- a/src/mainboard/intel/cougar_canyon2/romstage.c +++ b/src/mainboard/intel/cougar_canyon2/romstage.c @@ -185,11 +185,8 @@ void main(FSP_INFO_HEADER *fsp_info_header) post_code(0x40); -#if CONFIG_COLLECT_TIMESTAMPS - uint32_t start_romstage_time = (uint32_t) (timestamp_get() >> 4); - /* since this mainboard doesn't use audio, we can stuff the TSC values in there */ - pci_write_config32(PCI_DEV(0, 27, 0), 0x2c, start_romstage_time); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); pch_enable_lpc(); @@ -237,11 +234,7 @@ void main(FSP_INFO_HEADER *fsp_info_header) post_code(0x48); -#if CONFIG_COLLECT_TIMESTAMPS - uint32_t before_initram_time = (uint32_t) (timestamp_get() >> 4); - /* since this mainboard doesn't use audio, we can stuff the TSC values in there */ - pci_write_config32(PCI_DEV(0, 27, 0), 0x14, before_initram_time); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); /* * Call early init to initialize memory and chipset. This function returns @@ -262,11 +255,7 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) { u32 reg32; void *cbmem_hob_ptr; -#if CONFIG_COLLECT_TIMESTAMPS - uint64_t after_initram_time = timestamp_get(); - uint64_t start_romstage_time = (uint64_t) pci_read_config32(PCI_DEV(0, 27, 0), 0x2c) << 4; - uint64_t before_initram_time = (uint64_t) pci_read_config32(PCI_DEV(0, 27, 0), 0x14) << 4; -#endif + timestamp_add_now(TS_AFTER_INITRAM); /* * HD AUDIO is not used on this system, so we're using some registers @@ -320,10 +309,6 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) { *(u32*)cbmem_hob_ptr = (u32)HobListPtr; post_code(0x4f); - timestamp_init(get_initial_timestamp()); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_initram_time ); - timestamp_add(TS_AFTER_INITRAM, after_initram_time); timestamp_add_now(TS_END_ROMSTAGE); /* Load the ramstage. */ diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index 8ba0886..de88c02 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -162,6 +162,9 @@ void main(FSP_INFO_HEADER *fsp_info_header) memset((void *)CONFIG_DCACHE_RAM_BASE,0,CONFIG_DCACHE_RAM_SIZE - 0x1000); post_code(0x40); + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); + program_base_addresses(); post_code(0x41); @@ -200,6 +203,8 @@ void main(FSP_INFO_HEADER *fsp_info_header) post_code(0x47); + timestamp_add_now(TS_BEFORE_INITRAM); + /* * Call early init to initialize memory and chipset. This function returns * to the romstage_main_continue function with a pointer to the HOB @@ -221,9 +226,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { uint32_t prev_sleep_state; struct romstage_handoff *handoff; -#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) - uint64_t after_initram_time = timestamp_get(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x4a); printk(BIOS_DEBUG, "%s status: %x hob_list_ptr: %x\n", @@ -266,8 +269,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { else printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - timestamp_init(get_initial_timestamp()); - timestamp_add(TS_AFTER_INITRAM, after_initram_time); timestamp_add_now(TS_END_ROMSTAGE); post_code(0x4f); diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c index 62cb567..f41b637 100644 --- a/src/southbridge/intel/fsp_rangeley/romstage.c +++ b/src/southbridge/intel/fsp_rangeley/romstage.c @@ -56,6 +56,9 @@ void main(FSP_INFO_HEADER *fsp_info_header) */ outb(0x40, 0x80); + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); + /* Rangeley UART POR state is enabled */ console_init(); post_code(0x41); @@ -78,6 +81,8 @@ void main(FSP_INFO_HEADER *fsp_info_header) read32(func_dis); } + timestamp_add_now(TS_BEFORE_INITRAM); + /* * Call early init to initialize memory and chipset. This function returns * to the romstage_main_continue function with a pointer to the HOB @@ -97,9 +102,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { int cbmem_was_initted; void *cbmem_hob_ptr; -#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) - uint64_t after_initram_time = timestamp_get(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x48); printk(BIOS_DEBUG, "%s status: %x hob_list_ptr: %x\n", @@ -130,8 +133,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { *(u32*)cbmem_hob_ptr = (u32)hob_list_ptr; post_code(0x4e); - timestamp_init(get_initial_timestamp()); - timestamp_add(TS_AFTER_INITRAM, after_initram_time); timestamp_add_now(TS_END_ROMSTAGE); post_code(0x4f);

1 0

Patch set updated for coreboot: 05d0959 CBMEM console: Fix CAR migration step
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8032 -gerrit commit 05d09595a66f698b694ffb3577f0c577d2756165 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Dec 31 18:34:59 2014 +0200 CBMEM console: Fix CAR migration step With the change it becomes irrelevant if memcpy() car.global_data or cbmemc_reinit() is done first. Change-Id: Ie479eef346c959e97dcc55861ccb0db1321fb7b2 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/arm/include/arch/early_variables.h | 1 + src/arch/arm64/include/arch/early_variables.h | 1 + src/arch/riscv/include/arch/early_variables.h | 1 + src/arch/x86/include/arch/early_variables.h | 6 +++++ src/cpu/x86/car.c | 32 +++++++++++++++++++++++++++ src/lib/cbmem_console.c | 2 +- 6 files changed, 42 insertions(+), 1 deletion(-) diff --git a/src/arch/arm/include/arch/early_variables.h b/src/arch/arm/include/arch/early_variables.h index 5b58baa..cb0872e 100644 --- a/src/arch/arm/include/arch/early_variables.h +++ b/src/arch/arm/include/arch/early_variables.h @@ -25,6 +25,7 @@ #define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) +#define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) static inline void car_migrate_variables(void) { } diff --git a/src/arch/arm64/include/arch/early_variables.h b/src/arch/arm64/include/arch/early_variables.h index 5b58baa..cb0872e 100644 --- a/src/arch/arm64/include/arch/early_variables.h +++ b/src/arch/arm64/include/arch/early_variables.h @@ -25,6 +25,7 @@ #define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) +#define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) static inline void car_migrate_variables(void) { } diff --git a/src/arch/riscv/include/arch/early_variables.h b/src/arch/riscv/include/arch/early_variables.h index 3a1f20d..f9516a4 100644 --- a/src/arch/riscv/include/arch/early_variables.h +++ b/src/arch/riscv/include/arch/early_variables.h @@ -29,6 +29,7 @@ #define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) +#define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) static inline void car_migrate_variables(void) { } diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h index f76c048..2d5ae85 100644 --- a/src/arch/x86/include/arch/early_variables.h +++ b/src/arch/x86/include/arch/early_variables.h @@ -39,9 +39,14 @@ asm(".previous"); /* Get the correct pointer for the CAR global variable. */ void *car_get_var_ptr(void *var); +/* Get and update a CAR_GLOBAL pointing elsewhere in car.global_data*/ +void *car_sync_var_ptr(void *var); + /* Get and set a primitive type global variable. */ #define car_get_var(var) \ *(typeof(var) *)car_get_var_ptr(&(var)) +#define car_sync_var(var) \ + *(typeof (var) *)car_sync_var_ptr(&(var)) #define car_set_var(var, val) \ do { car_get_var(var) = (val); } while(0) @@ -49,6 +54,7 @@ void *car_get_var_ptr(void *var); #define CAR_MIGRATE(migrate_fn_) static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) +#define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) #endif diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c index c9cc6d6..e757f09 100644 --- a/src/cpu/x86/car.c +++ b/src/cpu/x86/car.c @@ -73,6 +73,38 @@ void *car_get_var_ptr(void *var) return &migrated_base[offset]; } +/* + * Update a CAR_GLOBAL variable var, originally pointing to CAR region, + * with the address in migrated CAR region in DRAM. + */ +void *car_sync_var_ptr(void *var) +{ + void ** mig_var = car_get_var_ptr(var); + void * _car_start = &_car_data_start; + void * _car_end = &_car_data_end; + + /* Not moved or migrated yet. */ + if (mig_var == var) + return mig_var; + + /* It's already pointing outside car.global_data. */ + if (*mig_var < _car_start || *mig_var > _car_end) + return mig_var; + +#if !IS_ENABLED(CONFIG_PLATFORM_USES_FSP) + /* Keep console buffer in CAR until cbmemc_reinit() moves it. */ + if (*mig_var == _car_end) + return mig_var; +#endif + + /* Move the pointer by the same amount the variable storing it was + * moved by. + */ + *mig_var += (char *)mig_var - (char *)var; + + return mig_var; +} + static void do_car_migrate_variables(void) { void *migrated_base; diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 997bb7d..a8195a6 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -65,7 +65,7 @@ static u8 static_console[STATIC_CONSOLE_SIZE]; static inline struct cbmem_console *current_console(void) { - return car_get_var(cbmem_console_p); + return car_sync_var(cbmem_console_p); } static inline void current_console_set(struct cbmem_console *new_console_p)

1 0

Patch set updated for coreboot: 3b69d38 CBMEM: Add timestamp_reinit()
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8033 -gerrit commit 3b69d38a178d1607500c762e3a509d6607016d42 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Dec 19 10:17:46 2014 +0200 CBMEM: Add timestamp_reinit() This avoids the need for separate timestamp_reinit() calls made via CAR_MIGRATE() that is not implemented for ARM. Change-Id: Ia683162f3cb5d3cb3d4b7983a4b7e13306b0cfc8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/boot/cbmem.c | 4 ++++ src/lib/cbmem_common.c | 4 ++++ src/lib/hardwaremain.c | 2 -- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index b53745b..34309c2 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -23,6 +23,7 @@ /* FIXME: Remove after CBMEM_INIT_HOOKS. */ #include <cpu/x86/gdt.h> #include <console/cbmem_console.h> +#include <timestamp.h> #if !CONFIG_DYNAMIC_CBMEM void get_cbmem_table(uint64_t *base, uint64_t *size) @@ -79,6 +80,9 @@ void cbmem_run_init_hooks(void) /* Relocate CBMEM console. */ cbmemc_reinit(); + /* Relocate timestamps stash. */ + timestamp_reinit(); + move_gdt(); #endif } diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c index 1630628..33f16b5 100644 --- a/src/lib/cbmem_common.c +++ b/src/lib/cbmem_common.c @@ -22,6 +22,7 @@ /* FIXME: Remove after CBMEM_INIT_HOOKS. */ #include <console/cbmem_console.h> +#include <timestamp.h> #ifndef __PRE_RAM__ @@ -57,6 +58,9 @@ void cbmem_run_init_hooks(void) { /* Relocate CBMEM console. */ cbmemc_reinit(); + + /* Relocate timestamps stash. */ + timestamp_reinit(); } void __attribute__((weak)) cbmem_fail_resume(void) diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index e01247b..d43ff46 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -181,8 +181,6 @@ static boot_state_t bs_post_device(void *arg) dev_finalize(); timestamp_add_now(TS_DEVICE_DONE); - timestamp_reinit(); - return BS_OS_RESUME_CHECK; }

1 0

Patch set updated for coreboot: a170b14 FSP & CBMEM: Fix broken cbmem CAR transition.
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8196 -gerrit commit a170b14ecc51d5d1e48e20f81fd2294a7ba19187 Author: Martin Roth <gaumless(a)gmail.com> Date: Sun Jan 11 14:29:29 2015 -0700 FSP & CBMEM: Fix broken cbmem CAR transition. 1) Save the pointer to the FSP HOB list to low memory at address 0x614. This is the same location as CBMEM_RESUME_BACKUP - the two aren't used in the same platform, so overlapping should be OK. I didn't see any documentation that actually said that this location was free to use, and didn't need to be restored after use in S3 resume, but it looks like the DOS boot vector gets loaded juat above this location, so it SHOULD be ok. The alternative is to copy the memory out and store it in cbmem until we're ready to restore it. 2) When a request for the pointer to a CAR variable comes in, pass back the location *INSIDE* the FSP hob structure. 3) Skip the memcopy of the CAR Data. The CAR variables do not get transitioned back into cbmem, but used out of the HOB structure. 4) Remove the BROKEN_CAR_MIGRATE Kconfig option from the FSP platform. Change-Id: Iaf566dce1b41a3bcb17e4134877f68262b5e113f Signed-off-by: Martin Roth <gaumless(a)gmail.com> --- src/cpu/intel/fsp_model_206ax/Kconfig | 1 - src/cpu/intel/fsp_model_406dx/Kconfig | 1 - src/cpu/x86/car.c | 36 +++++++++++++++++++--- src/include/cbmem.h | 1 + .../intel/fsp_rangeley/fsp/chipset_fsp_util.c | 2 ++ .../intel/fsp_sandybridge/fsp/chipset_fsp_util.c | 1 + src/soc/intel/fsp_baytrail/Kconfig | 1 - src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 2 ++ 8 files changed, 38 insertions(+), 7 deletions(-) diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index ea99ee0..05bdce4 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -41,7 +41,6 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_CPU_INIT select TSC_SYNC_MFENCE select LAPIC_MONOTONIC_TIMER - select BROKEN_CAR_MIGRATE config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index c3acc78..ec4be84 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -36,7 +36,6 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_CPU_INIT select TSC_SYNC_MFENCE select LAPIC_MONOTONIC_TIMER - select BROKEN_CAR_MIGRATE choice prompt "Rangeley CPU Stepping" diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c index cca9afd..da351c5 100644 --- a/src/cpu/x86/car.c +++ b/src/cpu/x86/car.c @@ -41,13 +41,16 @@ extern char _car_data_end[]; */ static int car_migrated CAR_GLOBAL; - +/** @brief returns pointer to a CAR variable, before or after migration. + * + * @param var pointer to the CAR variable + */ void *car_get_var_ptr(void *var) { char *migrated_base; - int offset; void * _car_start = &_car_data_start; void * _car_end = &_car_data_end; + int offset = (char *)var - (char *)_car_start; /* If the cache-as-ram has not been migrated return the pointer * passed in. */ @@ -61,6 +64,31 @@ void *car_get_var_ptr(void *var) return var; } +#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP) + /* Avoid including fsp_util.h and everything that goes with it */ + void * find_saved_temp_mem(void *hob_list_ptr); + + /* Before memory is initialized: + * CBMEM_FSP_HOB_PTR == 0xffffffff + * Use CAR - handled above. + * + * After memory is initialized, but before the migration: + * CBMEM_FSP_HOB_PTR is a pointer to the start of the FSP HOB list. + * Use saved CAR area in HOB - handled here. + */ + + if (*(uint32_t *)CBMEM_FSP_HOB_PTR != 0xffffffff) { + /* find the saved temp memory so we can recover cbmem */ + char *saved_tmp_mem_location=(char *)find_saved_temp_mem( + *(void **)CBMEM_FSP_HOB_PTR); + + if (saved_tmp_mem_location == NULL) + die("Error: Could not locate Saved CAR memory."); + + return (void *)(saved_tmp_mem_location + offset); + } +#endif + migrated_base = cbmem_find(CBMEM_ID_CAR_GLOBALS); if (migrated_base == NULL) { @@ -68,8 +96,6 @@ void *car_get_var_ptr(void *var) return var; } - offset = (char *)var - (char *)_car_start; - return &migrated_base[offset]; } @@ -121,7 +147,9 @@ static void do_car_migrate_variables(void) return; } +#if !IS_ENABLED(PLATFORM_USES_FSP) memcpy(migrated_base, &_car_data_start[0], car_data_size); +#endif /* Mark that the data has been moved. */ car_migrated = ~0; diff --git a/src/include/cbmem.h b/src/include/cbmem.h index ca7a5f4..2f86b85 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -40,6 +40,7 @@ */ #define CBMEM_BOOT_MODE 0x610 #define CBMEM_RESUME_BACKUP 0x614 +#define CBMEM_FSP_HOB_PTR 0x614 #define CBMEM_ID_FREESPACE 0x46524545 #define CBMEM_ID_GDT 0x4c474454 diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c index ae95087..18c947f 100644 --- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c +++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c @@ -167,6 +167,8 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams, void ChipsetFspReturnPoint(EFI_STATUS Status, VOID *HobListPtr) { + *(void **)CBMEM_FSP_HOB_PTR=HobListPtr; + if (Status == 0xFFFFFFFF) { soft_reset(); } diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c index a666d70..716873c 100644 --- a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c +++ b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c @@ -107,6 +107,7 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *FspInitParams, void ChipsetFspReturnPoint(EFI_STATUS Status, VOID *HobListPtr) { + *(void **)CBMEM_FSP_HOB_PTR=HobListPtr; if (Status == 0xFFFFFFFF) { hard_reset(); } diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index b05def2..0ebb5c7 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -50,7 +50,6 @@ config CPU_SPECIFIC_OPTIONS select SUPPORT_CPU_UCODE_IN_CBFS if INCLUDE_MICROCODE_IN_BUILD select CPU_MICROCODE_ADDED_DURING_BUILD if INCLUDE_MICROCODE_IN_BUILD select ROMSTAGE_RTC_INIT - select BROKEN_CAR_MIGRATE config BOOTBLOCK_CPU_INIT string diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c index c6b5f9c..b8c1bf6 100644 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -329,6 +329,8 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams, void ChipsetFspReturnPoint(EFI_STATUS Status, VOID *HobListPtr) { + *(void **)CBMEM_FSP_HOB_PTR=HobListPtr; + if (Status == 0xFFFFFFFF) { warm_reset(); }

1 0

Patch set updated for coreboot: 5ae21f6 CBMEM: Move cbmemc_reinit()
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7859 -gerrit commit 5ae21f670ec5fe4c3a265f5147beaaa6bf20cfbc Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Dec 31 19:29:02 2014 +0200 CBMEM: Move cbmemc_reinit() This replaces need for separate cbmemc_reinit() calls made via CAR_MIGRATE() and in ramstage. Change-Id: If7b4d855c75df58b173f26ef3c90a4a7563166d3 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/boot/cbmem.c | 4 ++++ src/lib/cbmem.c | 2 -- src/lib/cbmem_common.c | 5 +++++ src/lib/dynamic_cbmem.c | 2 -- src/mainboard/google/nyan/romstage.c | 5 ----- src/mainboard/google/nyan_big/romstage.c | 5 ----- src/mainboard/google/nyan_blaze/romstage.c | 5 ----- src/mainboard/via/epia-m850/romstage.c | 1 - src/soc/intel/fsp_baytrail/romstage/romstage.c | 1 - 9 files changed, 9 insertions(+), 21 deletions(-) diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index bbf70a2..b53745b 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -22,6 +22,7 @@ /* FIXME: Remove after CBMEM_INIT_HOOKS. */ #include <cpu/x86/gdt.h> +#include <console/cbmem_console.h> #if !CONFIG_DYNAMIC_CBMEM void get_cbmem_table(uint64_t *base, uint64_t *size) @@ -75,6 +76,9 @@ void *cbmem_top(void) void cbmem_run_init_hooks(void) { #if !defined(__PRE_RAM__) + /* Relocate CBMEM console. */ + cbmemc_reinit(); + move_gdt(); #endif } diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index 5f834b7..ba6560c 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -23,7 +23,6 @@ #include <bootstate.h> #include <cbmem.h> #include <console/console.h> -#include <console/cbmem_console.h> #include <arch/early_variables.h> #if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__) #include <arch/acpi.h> @@ -256,7 +255,6 @@ static void init_cbmem_post_device(void *unused) #else cbmem_recovery(0); #endif - cbmemc_reinit(); } BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = { diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c index 438fd7f..1630628 100644 --- a/src/lib/cbmem_common.c +++ b/src/lib/cbmem_common.c @@ -20,6 +20,9 @@ #include <cbmem.h> #include <stdlib.h> +/* FIXME: Remove after CBMEM_INIT_HOOKS. */ +#include <console/cbmem_console.h> + #ifndef __PRE_RAM__ static const struct cbmem_id_to_name cbmem_ids[] = { CBMEM_ID_TO_NAME_TABLE }; @@ -52,6 +55,8 @@ void cbmem_print_entry(int n, u32 id, u64 base, u64 size) #if !IS_ENABLED(CONFIG_ARCH_X86) void cbmem_run_init_hooks(void) { + /* Relocate CBMEM console. */ + cbmemc_reinit(); } void __attribute__((weak)) cbmem_fail_resume(void) diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c index ce4e625..a5f2fc2 100644 --- a/src/lib/dynamic_cbmem.c +++ b/src/lib/dynamic_cbmem.c @@ -21,7 +21,6 @@ #include <bootmem.h> #include <console/console.h> #include <cbmem.h> -#include <console/cbmem_console.h> #include <string.h> #include <stdlib.h> #include <arch/early_variables.h> @@ -426,7 +425,6 @@ void *cbmem_entry_start(const struct cbmem_entry *entry) static void init_cbmem_pre_device(void *unused) { cbmem_initialize(); - cbmemc_reinit(); } BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = { diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c index 4e02365..749b87d 100644 --- a/src/mainboard/google/nyan/romstage.c +++ b/src/mainboard/google/nyan/romstage.c @@ -25,7 +25,6 @@ #include <device/device.h> #include <cbfs.h> #include <cbmem.h> -#include <console/cbmem_console.h> #include <console/console.h> #include <mainboard/google/nyan/reset.h> #include <romstage_handoff.h> @@ -224,10 +223,6 @@ static void __attribute__((noinline)) romstage(void) configure_ec_spi_bus(); configure_tpm_i2c_bus(); -#if CONFIG_CONSOLE_CBMEM - cbmemc_reinit(); -#endif - vboot_verify_firmware(romstage_handoff_find_or_add()); timestamp_add(TS_START_COPYRAM, timestamp_get()); diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c index 4e02365..749b87d 100644 --- a/src/mainboard/google/nyan_big/romstage.c +++ b/src/mainboard/google/nyan_big/romstage.c @@ -25,7 +25,6 @@ #include <device/device.h> #include <cbfs.h> #include <cbmem.h> -#include <console/cbmem_console.h> #include <console/console.h> #include <mainboard/google/nyan/reset.h> #include <romstage_handoff.h> @@ -224,10 +223,6 @@ static void __attribute__((noinline)) romstage(void) configure_ec_spi_bus(); configure_tpm_i2c_bus(); -#if CONFIG_CONSOLE_CBMEM - cbmemc_reinit(); -#endif - vboot_verify_firmware(romstage_handoff_find_or_add()); timestamp_add(TS_START_COPYRAM, timestamp_get()); diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c index 480abd6..a23937e 100644 --- a/src/mainboard/google/nyan_blaze/romstage.c +++ b/src/mainboard/google/nyan_blaze/romstage.c @@ -25,7 +25,6 @@ #include <device/device.h> #include <cbfs.h> #include <cbmem.h> -#include <console/cbmem_console.h> #include <console/console.h> #include <mainboard/google/nyan/reset.h> #include <romstage_handoff.h> @@ -224,10 +223,6 @@ static void __attribute__((noinline)) romstage(void) configure_ec_spi_bus(); configure_tpm_i2c_bus(); -#if CONFIG_CONSOLE_CBMEM - cbmemc_reinit(); -#endif - #if CONFIG_VBOOT2_VERIFY_FIRMWARE // vboot_create_handoff((void *)CONFIG_VBOOT_WORK_BUFFER_ADDRESS); #else diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index b6e3635..8912d13 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -31,7 +31,6 @@ #include <cpu/x86/bist.h> #include <string.h> #include <timestamp.h> -#include <console/cbmem_console.h> #include <northbridge/via/vx900/early_vx900.h> #include <northbridge/via/vx900/raminit.h> diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index ad42e73..b0b8133 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -43,7 +43,6 @@ #include <version.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> -#include <console/cbmem_console.h> /* Return 0, 3, 4 or 5 to indicate the previous sleep state. */ uint32_t chipset_prev_sleep_state(uint32_t clear)

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Patch set updated for coreboot: 3d7f79e CBMEM: Tidy up CAR migration
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7860 -gerrit commit 3d7f79efc7315425ab912b138fd9bbab41d8e1e4 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Dec 31 20:55:19 2014 +0200 CBMEM: Tidy up CAR migration Move the CAR migration call to arch -specific part of CBMEM init, it is truly a x86 specific thing. Change-Id: I715417e54f197b8745e0670d6b900a5660178141 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 14 -------------- src/arch/arm/include/arch/early_variables.h | 1 - src/arch/arm64/include/arch/early_variables.h | 1 - src/arch/riscv/include/arch/early_variables.h | 5 ----- src/arch/x86/Kconfig | 15 +++++++++++++++ src/arch/x86/boot/cbmem.c | 4 ++++ src/cpu/x86/car.c | 8 +++++++- src/lib/cbmem.c | 3 ++- src/lib/dynamic_cbmem.c | 10 ++-------- 9 files changed, 30 insertions(+), 31 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 92714d5..a58e04a 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -159,20 +159,6 @@ config INCLUDE_CONFIG_FILE config EARLY_CBMEM_INIT def_bool !LATE_CBMEM_INIT -config LATE_CBMEM_INIT - def_bool n - help - Enable this in chipset's Kconfig if northbridge does not implement - early get_top_of_ram() call for romstage. CBMEM tables will be - allocated late in ramstage, after PCI devices resources are known. - -config BROKEN_CAR_MIGRATE - def_bool LATE_CBMEM_INIT - help - Many boards use CAR_GLOBAL but have no EARLY_CBMEM_INIT and - manage CAR migration on S3 resume path only. Couple boards use - CAR_GLOBAL and never do CAR migration. - config DYNAMIC_CBMEM bool default n diff --git a/src/arch/arm/include/arch/early_variables.h b/src/arch/arm/include/arch/early_variables.h index cb0872e..97bc0cd 100644 --- a/src/arch/arm/include/arch/early_variables.h +++ b/src/arch/arm/include/arch/early_variables.h @@ -27,6 +27,5 @@ static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) -static inline void car_migrate_variables(void) { } #endif diff --git a/src/arch/arm64/include/arch/early_variables.h b/src/arch/arm64/include/arch/early_variables.h index cb0872e..97bc0cd 100644 --- a/src/arch/arm64/include/arch/early_variables.h +++ b/src/arch/arm64/include/arch/early_variables.h @@ -27,6 +27,5 @@ static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) -static inline void car_migrate_variables(void) { } #endif diff --git a/src/arch/riscv/include/arch/early_variables.h b/src/arch/riscv/include/arch/early_variables.h index f9516a4..97bc0cd 100644 --- a/src/arch/riscv/include/arch/early_variables.h +++ b/src/arch/riscv/include/arch/early_variables.h @@ -20,10 +20,6 @@ #ifndef ARCH_EARLY_VARIABLES_H #define ARCH_EARLY_VARIABLES_H -#if defined(CONFIG_CAR_MIGRATION) && CONFIG_CAR_MIGRATION - #error "This is RISCV, silly... we don't have CAR here." -#endif - #define CAR_GLOBAL #define CAR_MIGRATE(migrate_fn_) @@ -31,6 +27,5 @@ static inline void *car_get_var_ptr(void *var) { return var; } #define car_get_var(var) (var) #define car_sync_var(var) (var) #define car_set_var(var, val) do { (var) = (val); } while (0) -static inline void car_migrate_variables(void) { } #endif diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index edbc67a..dfb91fa 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -51,6 +51,21 @@ config ROMCC bool default n +config BROKEN_CAR_MIGRATE + def_bool n + help + Many boards use CAR_GLOBAL but have no EARLY_CBMEM_INIT and + manage CAR migration on S3 resume path only. Couple boards use + CAR_GLOBAL and never do CAR migration. + +config LATE_CBMEM_INIT + def_bool n + select BROKEN_CAR_MIGRATE + help + Enable this in chipset's Kconfig if northbridge does not implement + early get_top_of_ram() call for romstage. CBMEM tables will be + allocated late in ramstage, after PCI devices resources are known. + config PC80_SYSTEM bool default y if ARCH_X86 diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index af42edd..80588c3 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -21,6 +21,7 @@ #include <arch/acpi.h> /* FIXME: Remove after CBMEM_INIT_HOOKS. */ +#include <arch/early_variables.h> #include <cpu/x86/gdt.h> #include <console/cbmem_console.h> #include <timestamp.h> @@ -76,6 +77,9 @@ void *cbmem_top(void) void cbmem_run_init_hooks(void) { + /* Migrate car.global_data. */ + car_migrate_variables(); + #if !defined(__PRE_RAM__) /* Relocate CBMEM console. */ cbmemc_reinit(); diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c index e757f09..cca9afd 100644 --- a/src/cpu/x86/car.c +++ b/src/cpu/x86/car.c @@ -108,7 +108,6 @@ void *car_sync_var_ptr(void *var) static void do_car_migrate_variables(void) { void *migrated_base; - car_migration_func_t *migrate_func; size_t car_data_size = &_car_data_end[0] - &_car_data_start[0]; /* Check if already migrated. */ @@ -126,7 +125,11 @@ static void do_car_migrate_variables(void) /* Mark that the data has been moved. */ car_migrated = ~0; +} +static void do_car_migrate_hooks(void) +{ + car_migration_func_t *migrate_func; /* Call all the migration functions. */ migrate_func = &_car_migrate_start; while (*migrate_func != NULL) { @@ -139,4 +142,7 @@ void car_migrate_variables(void) { if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE)) do_car_migrate_variables(); + + if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE)) + do_car_migrate_hooks(); } diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index ba6560c..d5f89a1 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -242,8 +242,9 @@ int cbmem_recovery(int is_wakeup) cbmem_fail_resume(); } + /* Complete migration to CBMEM. */ cbmem_run_init_hooks(); - car_migrate_variables(); + return !found; } diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c index a5f2fc2..6455217 100644 --- a/src/lib/dynamic_cbmem.c +++ b/src/lib/dynamic_cbmem.c @@ -170,18 +170,14 @@ void cbmem_initialize_empty(void) printk(BIOS_DEBUG, "CBMEM: root @ %p %d entries.\n", root, root->max_entries); + /* Complete migration to CBMEM. */ cbmem_run_init_hooks(); - - /* Migrate cache-as-ram variables. */ - car_migrate_variables(); } static inline int cbmem_fail_recovery(void) { cbmem_initialize_empty(); cbmem_fail_resume(); - /* Migrate cache-as-ram variables. */ - car_migrate_variables(); return 1; } @@ -248,11 +244,9 @@ int cbmem_initialize(void) root->locked = 1; #endif + /* Complete migration to CBMEM. */ cbmem_run_init_hooks(); - /* Migrate cache-as-ram variables. */ - car_migrate_variables(); - /* Recovery successful. */ return 0; }

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Patch set updated for coreboot: 7bc5f0b CBMEM: Support DYNAMIC_CBMEM with LATE_CBMEM_INIT
by Kyösti Mälkki 27 Jan '15

27 Jan '15

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7861 -gerrit commit 7bc5f0b326e129580aa92250ec323c67ae8de0e8 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Dec 19 08:20:45 2014 +0200 CBMEM: Support DYNAMIC_CBMEM with LATE_CBMEM_INIT We can now create CBMEM with dynamic allocation even if CBMEM location is resolved late in ramstage. Change-Id: I8529ccbcd4a0e567ebe0a46232ac5d16476e81a8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 3 +-- src/arch/x86/boot/cbmem.c | 14 +++++++++----- src/include/cbmem.h | 19 +++++++++++++------ src/lib/cbmem_console.c | 2 +- src/lib/dynamic_cbmem.c | 38 ++++++++++++++++++++++++++++++++++---- 5 files changed, 58 insertions(+), 18 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index a58e04a..560f9e5 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -162,7 +162,6 @@ config EARLY_CBMEM_INIT config DYNAMIC_CBMEM bool default n - select EARLY_CBMEM_INIT help Instead of reserving a static amount of CBMEM space the CBMEM area grows dynamically. CBMEM can be used both in romstage (after @@ -201,7 +200,7 @@ config RELOCATABLE_MODULES loaded anywhere and all the relocations are handled automatically. config RELOCATABLE_RAMSTAGE - depends on (RELOCATABLE_MODULES && DYNAMIC_CBMEM) + depends on (RELOCATABLE_MODULES && DYNAMIC_CBMEM && EARLY_CBMEM_INIT) bool "Build the ramstage to be relocatable in 32-bit address space." default n help diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index a145223..1036adc 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -39,6 +39,9 @@ void get_cbmem_table(uint64_t *base, uint64_t *size) *size = 0; } } +#endif /* !DYNAMIC_CBMEM */ + +#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) #if !defined(__PRE_RAM__) void __attribute__((weak)) backup_top_of_ram(uint64_t ramtop) @@ -46,14 +49,14 @@ void __attribute__((weak)) backup_top_of_ram(uint64_t ramtop) /* Do nothing. Chipset may have implementation to save ramtop in NVRAM. */ } -/* This is for compatibility with old boards only. Any new chipset and board - * must implement get_top_of_ram() for both romstage and ramstage to support - * early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE. - */ void set_top_of_ram(uint64_t ramtop) { backup_top_of_ram(ramtop); +#if !CONFIG_DYNAMIC_CBMEM cbmem_late_set_table(ramtop - HIGH_MEMORY_SIZE, HIGH_MEMORY_SIZE); +#else + cbmem_set_top((void*)(uintptr_t)ramtop); +#endif } #endif /* !__PRE_RAM__ */ @@ -70,7 +73,8 @@ void *cbmem_top(void) return (void *)get_top_of_ram(); } #endif -#endif /* !DYNAMIC_CBMEM */ + +#endif /* LATE_CBMEM_INIT */ void cbmem_run_init_hooks(void) { diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 05708da..c2e7314 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -151,6 +151,9 @@ void cbmem_initialize_empty(void); * below 4GiB. */ void *cbmem_top(void); +/* Set the top address for dynamic cbmem. Not for new designs. */ +void cbmem_set_top(void *ramtop); + /* Add a cbmem entry of a given size and id. These return NULL on failure. The * add function performs a find first and do not check against the original * size. */ @@ -168,7 +171,6 @@ int cbmem_entry_remove(const struct cbmem_entry *entry); void *cbmem_entry_start(const struct cbmem_entry *entry); u64 cbmem_entry_size(const struct cbmem_entry *entry); - #else /* !CONFIG_DYNAMIC_CBMEM */ /* Allocation with static CBMEM is resolved at build time. We start @@ -183,15 +185,10 @@ u64 cbmem_entry_size(const struct cbmem_entry *entry); #define HIGH_MEMORY_SIZE ALIGN_UP(_CBMEM_SZ_TOTAL, 0x10000) - #ifndef __PRE_RAM__ -void set_top_of_ram(uint64_t ramtop); -void backup_top_of_ram(uint64_t ramtop); void cbmem_late_set_table(uint64_t base, uint64_t size); #endif -unsigned long get_top_of_ram(void); - void get_cbmem_table(uint64_t *base, uint64_t *size); struct cbmem_entry *get_cbmem_toc(void); @@ -224,6 +221,16 @@ void cbmem_list(void); void cbmem_print_entry(int n, u32 id, u64 start, u64 size); #endif /* __PRE_RAM__ */ +/* These are for compatibility with old boards only. Any new chipset and board + * must implement cbmem_top() for both romstage and ramstage to support + * early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE. + */ +#if IS_ENABLED(CONFIG_ARCH_X86) && IS_ENABLED(CONFIG_LATE_CBMEM_INIT) +unsigned long get_top_of_ram(void); +void set_top_of_ram(uint64_t ramtop); +void backup_top_of_ram(uint64_t ramtop); +#endif + #endif /* __ASSEMBLER__ */ diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 6783b30..0c2722c 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -58,7 +58,7 @@ extern struct cbmem_console preram_cbmem_console; * during the ROM stage, once CBMEM becomes available at RAM stage. */ -#if CONFIG_DYNAMIC_CBMEM +#if IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) #define STATIC_CONSOLE_SIZE 1024 #else #define STATIC_CONSOLE_SIZE CONFIG_CONSOLE_CBMEM_BUFFER_SIZE diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c index 1b46745..6ec56c7 100644 --- a/src/lib/dynamic_cbmem.c +++ b/src/lib/dynamic_cbmem.c @@ -24,10 +24,9 @@ #include <string.h> #include <stdlib.h> #include <arch/early_variables.h> -#if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__) +#if IS_ENABLED(CONFIG_ARCH_X86) && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) #include <arch/acpi.h> #endif - #ifndef UINT_MAX #define UINT_MAX 4294967295U #endif @@ -69,11 +68,18 @@ struct cbmem_root { } __attribute__((packed)); +#if !defined(__PRE_RAM__) +static void *cached_cbmem_top; + +void cbmem_set_top(void * ramtop) +{ + cached_cbmem_top = ramtop; +} +#endif + static inline void *cbmem_top_cached(void) { #if !defined(__PRE_RAM__) - static void *cached_cbmem_top; - if (cached_cbmem_top == NULL) cached_cbmem_top = cbmem_top(); @@ -100,6 +106,9 @@ static inline void *get_root(void) struct cbmem_root_pointer *pointer; pointer_addr = get_top_aligned(); + if (pointer_addr == 0) + return NULL; + pointer_addr -= sizeof(struct cbmem_root_pointer); pointer = (void *)pointer_addr; @@ -146,6 +155,9 @@ void cbmem_initialize_empty(void) * DYN_CBMEM_ALIGN_SIZE. The pointer falls just below the * address returned by get_top_aligned(). */ pointer_addr = get_top_aligned(); + if (pointer_addr == 0) + return; + root_addr = pointer_addr - ROOT_MIN_SIZE; root_addr &= ~(DYN_CBMEM_ALIGN_SIZE - 1); pointer_addr -= sizeof(struct cbmem_root_pointer); @@ -413,6 +425,8 @@ void *cbmem_entry_start(const struct cbmem_entry *entry) #if !defined(__PRE_RAM__) + +#if IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) /* selected cbmem can be initialized early in ramstage. Additionally, that * means cbmem console can be reinitialized early as well. The post_device * function is empty since cbmem was initialized early in ramstage. */ @@ -426,6 +440,22 @@ BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = { init_cbmem_pre_device, NULL), }; +#else + +static void init_cbmem_post_device(void *unused) +{ + if (acpi_is_wakeup()) + cbmem_initialize(); + else + cbmem_initialize_empty(); +} + +BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = { + BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, + init_cbmem_post_device, NULL), +}; +#endif + void cbmem_add_bootmem(void) { uintptr_t base;

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coreboot-gerrit January 2015