the following patch was just integrated into master:
commit 29179f0735e5a73b024008f218a79dfb04193c69
Author: Dave Frodin <dave.frodin(a)se-eng.com>
Date: Thu Jun 12 16:28:21 2014 -0600
superio/nuvoton: Add chip support for setting IRQs to edge/level
Change-Id: I08b9eef9d6b0f120c17c3293f1f90b847742dc06
Signed-off-by: Dave Frodin <dave.frodin(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6064
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless(a)gmail.com>
See http://review.coreboot.org/6064 for details.
-gerrit
the following patch was just integrated into master:
commit da2daef4b43ac85657429fe9b3f4a6d18179d48d
Author: Dave Frodin <dave.frodin(a)se-eng.com>
Date: Mon Jun 9 12:33:24 2014 -0600
superio/nuvoton: Adds a function to route pins 41-48 to UARTD
Pins 41-48 default to being GPIs. This switches the internal
mux to connect them to UARTD.
Change-Id: I61393b8c35cbc664f6520f60eed09ba4bbede0dc
Signed-off-by: Dave Frodin <dave.frodin(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/5963
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/5963 for details.
-gerrit
the following patch was just integrated into master:
commit 7bf4f484c08e7256175e0db3024d3b76ba58613f
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Tue Jun 17 15:12:09 2014 +1000
southbridge/intel/lynxpoint/me_9.x.c: Use IS_ENABLED macro
Silence unused function warnings, spotted by Clang.
Change-Id: I5127893e9605ca490ff450faa92af5e9eafe8940
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6054
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
See http://review.coreboot.org/6054 for details.
-gerrit
the following patch was just integrated into master:
commit 22e9e66cacafc4f403b3b51f42cfecaf1a4be63b
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Mon Jun 16 14:09:10 2014 +1000
superio/ite/it8772f: Remove prototypes for func with no body
Change-Id: Iaf5db7153b08ac81b233f967c7a604ed08af91ca
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6040
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
See http://review.coreboot.org/6040 for details.
-gerrit
the following patch was just integrated into master:
commit 114f0ee9d4bbcfc7fc4a68d2bf7f2eeabde45efb
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Mon Jun 16 13:27:57 2014 +1000
src/mainboard/google/*/mainboard_smi.c: Remove #include .c's
No need for these.
Change-Id: I1df6e2ef06bd5546a66ee05a15fa2f7c3daf8853
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6039
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
See http://review.coreboot.org/6039 for details.
-gerrit
the following patch was just integrated into master:
commit 4c960d4ebe2f5ef486cf31fdeb9b92033642d907
Author: Paul Menzel <paulepanter(a)users.sourceforge.net>
Date: Thu Jun 5 22:12:06 2014 +0200
google/link, lenovo/x60: i915io.c: Use define `ARRAY_SIZE`
Change-Id: I8ddd46a573b61eba685efcc15456f288645d214d
Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5936
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-by: Aaron Durbin <adurbin(a)google.com>
See http://review.coreboot.org/5936 for details.
-gerrit
the following patch was just integrated into master:
commit d309eb145dbb0e79b0b678dc623949e12c15e02f
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Fri May 30 11:35:33 2014 +1000
mainboard/jetway/nf81-t56n-lf: Port recent Persimmon changes
Port to recent reference board (AMD Persimmon) changes in commits:
c93a75a AMD/CIMx: Add functions for AMD PCI IRQ routing
Change-Id: I307709bfee554bc64788a973da6d9313ca7c0de2
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5882
Tested-by: build bot (Jenkins)
Reviewed-by: Mike Loptien <mike.loptien(a)se-eng.com>
See http://review.coreboot.org/5882 for details.
-gerrit
the following patch was just integrated into master:
commit 4d9b77287e583c89fea4bac9f1c264b01dcab981
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Thu Jun 19 19:45:40 2014 +0300
ACPI: Add acpi_is_wakeup_s3()
Test explicitly for S3 resume.
Also switch to use IS_ENABLED().
Change-Id: I17ea729f51f99ea8d6135f2c7a807623f1286238
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6070
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/6070 for details.
-gerrit